Software synthesis through task decomposition by dependency analysis

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Software synthesis through task decomposition by dependency analysis

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International Conference on Computer Aided Design archive
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California, United States

Pages: 98 - 104

Year of Publication: 1997

ISBN:0-8186-7597-7

Authors

Youngsoo Shin	School of Electrical Engineering, Seoul National University, Seoul, Korea, 151-742
Kiyoung Choi	School of Electrical Engineering, Seoul National University, Seoul, Korea, 151-742

Sponsors

IEEE-CS : Computer Society
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Washington, DC, USA

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Downloads (6 Weeks): 4, Downloads (12 Months): 9, Citation Count: 2

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ABSTRACT

Latency tolerance is one of main problems of software synthesis in the design of hardware-software mixed systems. This paper presents a methodology for speeding up systems through latency tolerance which is obtained by decomposition of tasks and generation of an efficient scheduler. The task decomposition process focuses on the dependency analysis of system i/o operations. Scheduling of the decomposed tasks is performed in a mixed static and dynamic fashion. Experimental results show the significance of our approach.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Filip Thoen , Marco Cornero , Gert Goossens , Hugo De Man, Real-time multi-tasking in software synthesis for information processing systems, Proceedings of the 8th international symposium on System synthesis, p.48-53, September 13-15, 1995, Cannes, France [doi>10.1145/224486.224496]
	2	Kyuseok Kim , Yongjoo Kim , Youngsoo Shin , Kiyoung Choi, An integrated hardware-software cosimulation environment with automated interface generation, Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96), p.66, June 19-21, 1996
	3	Rajesh Kumar Gupta, Co-synthesis of hardware and software for digital embedded systems, Stanford University, Stanford, CA, 1994
	4	Rolf Ernst , Jorg Henkel , Thomas Benner, Hardware-Software Cosynthesis for Microcontrollers, IEEE Design & Test, v.10 n.4, p.64-75, October 1993 [doi>10.1109/54.245964]
	5	Youngsoo Shin , Kiyoung Choi, Thread-based software synthesis for embedded system design, Proceedings of the 1996 European conference on Design and Test, p.282, March 11-14, 1996
	6	J. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, "Ptolemy: a framework for simulating and prototyping heterogeneous systems," Int. J. of Computer Simulation, vol. 4, pp. 155-182, Apr. 1994.

CITED BY 2

	Chidamber Kulkarni , Matthias Gries , Christian Sauer , Kurt Keutzer, Programming challenges in network processor deployment, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA
	Youngsoo Shin , Kiyoung Choi, Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign, Proceedings of the 5th International Workshop on Hardware/Software Co-Design, p.3, March 24-26, 1997