A bridging model for parallel computation, communication, and I/O

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A bridging model for parallel computation, communication, and I/O

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ACM Computing Surveys (CSUR) archive
Volume 28 , Issue 4es (December 1996) table of contents
Special issue: position statements on strategic directions in computing research

Article No. 208

Year of Publication: 1996

ISSN:0360-0300

Authors

Thomas H. Cormen	Dartmouth College, Department of Computer Science, 6211 Sudikoff Laboratory, Hanover, NH
Michael T. Goodrich	The Johns Hopkins University, Department of Computer Science, Whiting School of Engineering, Baltimore, MD

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 6, Downloads (12 Months): 52, Citation Count: 1

Additional Information:

references cited by collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	Alpern et al. 1994	Alpern, B., Carter, L., Feig, E., and Selker, T., 1994. The Uniform Memory Hierarchy Model of Computation, Algorithmica, 12:2/3, August and September 1994, pages 72-109.
	Cormen Hirschl 1996	Thomas H. Cormen , Melissa Hirschl, Early Experiences in Evaluating the Parallel Disk Model with the ViC* Implementation, Dartmouth College, Hanover, NH, 1996
	Culler et al. 1993	David Culler , Richard Karp , David Patterson , Abhijit Sahay , Klaus Erik Schauser , Eunice Santos , Ramesh Subramonian , Thorsten von Eicken, LogP: towards a realistic model of parallel computation, Proceedings of the fourth ACM SIGPLAN symposium on Principles and practice of parallel programming, p.1-12, May 19-22, 1993, San Diego, California, United States
	Li 1996	Zhiyong Li , John H. Reif, Computational models and program synthesis for parallel out-of-core computation, 1996
	Valiant 1990	Leslie G. Valiant, A bridging model for parallel computation, Communications of the ACM, v.33 n.8, p.103-111, Aug. 1990 [doi>10.1145/79173.79181]
	Vitter Shriver 1994a	Vitter, J. S., and Shriver, E. A. M., 1994. Algorithms for Parallel Memory I: Two-level Memories, Algorithmica, 12:2/3, August and September 1994, pages 110-147.
	Vitter Shriver 1994b	Vitter, J. S., and Shriver, E. A. M., 1994. Algorithms for Parallel Memory II: Hierarchical Multilevel Memories, Algorithmica, 12:2/3, August and September 1994, pages 148-169.

CITED BY

Lars Arge , Michael T. Goodrich , Michael Nelson , Nodari Sitchinava, Fundamental parallel algorithms for private-cache chip multiprocessors, Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures, June 14-16, 2008, Munich, Germany

Collaborative Colleagues:

Thomas H. Cormen: colleagues

Michael T. Goodrich: colleagues

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