Hot-carrier reliability enhancement via input reordering and transistor sizing

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Hot-carrier reliability enhancement via input reordering and transistor sizing

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 819 - 824

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Aurobindo Dasgupta	Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA
Ramesh Karri	Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 6, Citation Count: 3

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	H. B. Bakoglu, Circuits, Interconnections and Packaging for VLSI, Addison-Wesley, 1989.
	2	R. Bryant, " A Switch-level model and simulator for MOS digital systems",IEEE Trans. on Computers, Feb 1984.
	3	C. Hu, M. Horowitz, "Hot-Electron-Induced MOSFET Degradation - Model Monitor and Improvement", Journal of Solid State Circuits, vol SC-20, No 1, Feb 1985.
	4	A. Dasgupta , R. Karri, Switch level hot-carrier reliability enhancement of VLSI circuits, Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, p.63, November 13-15, 1995
	5	Srinivas Devadas , Horng-Fei Jyu , Kurt Keutzer , Sharad Malik, Statistical Timing Analysis of Combinational Circuits, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.38-43, October 11-14, 1992
	6	A. Ghosh , S. Devadas , K. Keutzer , J. White, Estimation of average switching activity in combinational and sequential circuits, Proceedings of the 29th ACM/IEEE conference on Design automation, p.253-259, June 08-12, 1992, Anaheim, California, United States
	7	Heh-Tyan Liaw , Chen-Shang Lin, On the OBDD-Representation of General Boolean Functions, IEEE Transactions on Computers, v.41 n.6, p.661-664, June 1992 [doi>10.1109/12.144618]
	8	Y. Leblebici and S. M. Kang, "Hot-Carrier reliability of MOS VLSI circuits", Kluwer, 1993.
	9	Kaushik Roy , Sharat Prasad, Logic synthesis for reliability—an early start to controlling electromigration and hot carrier effects, Proceedings of the conference on European design automation, p.136-141, September 19-23, 1994, Grenoble, France
	10	C. Hu, "The Berkeley Reliability Simulator BERT: an IC Reliability Simulator", Microelectronics Journal, pp. 97-102, 1992.
	11	F.N. Najm, R. Butch, P. Yang, I. Hajj, "CREST - A current estimator for CMOS circuits", Proc. of ICCAD, 1988.
	12	P. C. Li and I. Hajj, "Computer Aided Redesign of VLSI Circuits for Hot-Carrier Reliability", Proc. of ICCD, 1993.

CITED BY 3

	Aurobindo Dasgupta , Ramesh Karri, Electromigration reliability enhancement via bus activity distribution, Proceedings of the 33rd annual conference on Design automation, p.353-356, June 03-07, 1996, Las Vegas, Nevada, United States
	Chih-Wei Chang , Kai Wang , Malgorzata Marek-Sadowska, Layout-driven hot-carrier degradation minimization using logic restructuring techniques, Proceedings of the 38th conference on Design automation, p.97-102, June 2001, Las Vegas, Nevada, United States
	Vijay Sundararajan , Keshab K. Parhi, Data transmission over a bus with peak-limited transition activity, Proceedings of the 2000 conference on Asia South Pacific design automation, p.221-224, January 2000, Yokohama, Japan