Energy characterization based on clustering

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Energy characterization based on clustering

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 702 - 707

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Huzefa Mehta	Department of Computer Science and Engineering, The Pennsylvania State University, PA
Robert Michael Owens	Department of Computer Science and Engineering, The Pennsylvania State University, PA
Mary Jane Irwin	Department of Computer Science and Engineering, The Pennsylvania State University, PA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 10, Citation Count: 28

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Huzefa Mehta, Robert Owens, and Mary Jane Irwin. Instruction level power profiling. In International Conference on Acoustics, Speech and Signal Processing, 1996. To appear.
	2	James T. McClave and Frank H. Dietrick. A First Course in Statistics. Macmillan Inc.,, 1989.
	3	Lothar Sachs. Applied Statistics- A Handbook of Techniques. Springer-Verlag, 1984.
	4	Paul E. Landman and Jan M. Rabaey. Power estimation for high level synthesis. In EDAC-EUROASIC, pages 361-366, 1993.
	5	Paul E. Landman and Jan M. Rabaey. Black-box capacitance models for architectural power analysis. In Proceedings of the International Workshop on Low Power Design, pages 165-170, April 1994.
	6	Paul E. Landman , Jan M. Rabaey, Activity-sensitive architectural power analysis for the control path, Proceedings of the 1995 international symposium on Low power design, p.93-98, April 23-26, 1995, Dana Point, California, United States [doi>10.1145/224081.224098]
	7	Scott R. Powell and Paul M. Chau. Estimating power dissipation of VLSI signal processing chips: The PFA technique. In VLSI Signal Processing IV, pages 250- 259, 1990.
	8	T. Sato, M. Nagamatsu, and H. Tago. Power and performance simulator: ESP and its applications for 100 MIPS/W class RISC design. In Proceedings of the 199~ IEEE Symposium on Low Power Electronics, pages 46- 47, Oct 1994.
	9	Tsutomu Sasao, Logic Synthesis and Optimization, Kluwer Academic Publishers, Norwell, MA, 1997
	10	Vivek Tiwari , Sharad Malik , Andrew Wolfe, Power analysis of embedded software: a first step towards software power minimization, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.384-390, November 06-10, 1994, San Jose, California, United States

CITED BY 28

	Tony D. Givargis , Frank Vahid , Jörg Henkel, Instruction-based system-level power evaluation of system-on-a-chip peripheral cores, Proceedings of the 13th international symposium on System synthesis, September 20-22, 2000, Madrid, Spain
	Huzefa Mehta , Robert Michael Owens , Mary Jane Irwin , Rita Chen , Debashree Ghosh, Techniques for low energy software, Proceedings of the 1997 international symposium on Low power electronics and design, p.72-75, August 18-20, 1997, Monterey, California, United States
	A. Bogliolo , L. Benini , G. De Micheli, Characterization-free behavioral power modeling, Proceedings of the conference on Design, automation and test in Europe, p.767-773, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Alessandro Bogliolo , Luca Benini, Node sampling: a robust RTL power modeling approach, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.461-467, November 08-12, 1998, San Jose, California, United States
	Tony D. Givargis , Frank Vahid , Jörg Henkel, Trace-driven system-level power evaluation of system-on-a-chip peripheral cores, Proceedings of the 2001 conference on Asia South Pacific design automation, p.306-312, January 2001, Yokohama, Japan
	Zhanping Chen , Kaushik Roy , Edwin K. P. Chong, Estimation of power sensitivity in sequential circuits with power macromodeling application, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.468-472, November 08-12, 1998, San Jose, California, United States
	Jing-Yuan Lin , Wen-Zen Shen , Jing-Yang Jou, A power modeling and characterization method for macrocells using structure information, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.502-506, November 09-13, 1997, San Jose, California, United States
	Akshaye Sama , J. F. M. Theeuwen , M. Balakrishnan, Speeding up power estimation of embedded software, Proceedings of the 2000 international symposium on Low power electronics and design, p.191-196, July 25-27, 2000, Rapallo, Italy
	Rita Yu Chen , Robert M. Owens , Mary Jane Irwin , R. S. Bajwa , Raminder S. Bajwa, Validation of an architectural level power analysis technique, Proceedings of the 35th annual conference on Design automation, p.242-245, June 15-19, 1998, San Francisco, California, United States
	Subodh Gupta , Farid N. Najm, Power macromodeling for high level power estimation, Proceedings of the 34th annual conference on Design automation, p.365-370, June 09-13, 1997, Anaheim, California, United States
	Alessandro Bogliolo , Luca Benini , Giovanni De Micheli, Regression-based RTL power modeling, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.3, p.337-372, July 2000
	Zhanping Chen , Kaushik Roy, A power macromodeling technique based on power sensitivity, Proceedings of the 35th annual conference on Design automation, p.678-683, June 15-19, 1998, San Francisco, California, United States
	N. Vijaykrishnan , M. Kandemir , M. J. Irwin , H. S. Kim , W. Ye, Energy-driven integrated hardware-software optimizations using SimplePower, ACM SIGARCH Computer Architecture News, v.28 n.2, p.95-106, May 2000
	Subodh Gupta , Farid N. Najm, Energy-per-cycle estimation at RTL, Proceedings of the 1999 international symposium on Low power electronics and design, p.121-126, August 16-17, 1999, San Diego, California, United States
	Rita Yu Chen , Mary Jane Irwin , Raminder S. Bajwa, Architecture-level power estimation and design experiments, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.6 n.1, p.50-66, Jan. 2001
	N. Vijaykrishnan , Mahmut Kandemir , Mary Jane Irwin , Hyun Suk Kim , Wu Ye , David Duarte, Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework, IEEE Transactions on Computers, v.52 n.1, p.59-76, January 2003
	Anand Raghunathan , Sujit Dey , Niraj K. Jha, High-level macro-modeling and estimation techniques for switching activity and power consumption, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.4, p.538-557, August 2003
	Subodh Gupta , Farid N. Najm, Energy and peak-current per-cycle estimation at RTL, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.4, p.525-537, August 2003
	W. Ye , N. Vijaykrishnan , M. Kandemir , M. J. Irwin, The design and use of simplepower: a cycle-accurate energy estimation tool, Proceedings of the 37th conference on Design automation, p.340-345, June 05-09, 2000, Los Angeles, California, United States
	A. Parikh , Soontae Kim , M. Kandemir , N. Vijaykrishnan , M. J. Irwin, Instruction Scheduling for Low Power, Journal of VLSI Signal Processing Systems, v.37 n.1, p.129-149, May 2004
	Nam Sung Kim , Taeho Kgil , Valeria Bertacco , Todd Austin , Trevor Mudge, Microarchitectural power modeling techniques for deep sub-micron microprocessors, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
	Nam Sung Kim , Todd Austin , Trevor Mudge , Dirk Grunwald, Challenges for architectural level power modeling, Power aware computing, Kluwer Academic Publishers, Norwell, MA, 2002
	Sudhakar Bobba , Tyler Thorp , Kathirgamar Aingaran , Dean Liu, IC power distribution challenges, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	Chih-Yang Hsu , Chien-Nan Jimmy Liu , Jing-Yang Jou, An efficient IP-level power model for complex digital circuits, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
	Alessandro Bolgiolo , Roberto Corgnati , Enrico Macii , Massimo Poncino, Parameterized RTL power models for soft macros, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.6, p.880-887, 12/1/2001
	Lin Zhong , S. Ravi , A. Raghunathan , N. K. Jha, Power estimation for cycle-accurate functional descriptions of hardware, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.668-675, November 07-11, 2004
	L. Benini , A. Bogliolo , M. Favalli , G. De Micheli, Regression Models for Behavioral Power Estimation, Integrated Computer-Aided Engineering, v.5 n.2, p.95-106, April 1998
	J. Chan , S. Parameswaran, NoCEE: energy macro-model extraction methodology for network on chip routers, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.254-259, November 06-10, 2005, San Jose, CA

INDEX TERMS

Primary Classification:
J. Computer Applications

General Terms:
Algorithms, Measurement, Performance, Theory

Collaborative Colleagues:

Huzefa Mehta: colleagues

Robert Michael Owens: colleagues

Mary Jane Irwin: colleagues

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