Efficient software performance estimation methods for hardware/software codesign

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Efficient software performance estimation methods for hardware/software codesign

Full text

Pdf (126 KB)

Source

Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 605 - 610

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Kei Suzuki	Central Research Laboratory, Hitachi Ltd., 1-280 Higashi-koigakubo, Kokubunji, Tokyo 185, JAPAN
Alberto Sangiovanni-Vincentelli	Department of Electrical Engineering and Computer Sciences, University of California Berkeley, Berkeley, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 9, Downloads (12 Months): 57, Citation Count: 26

Additional Information:

references cited by index terms collaborative colleagues

Tools and Actions:	Request Permissions Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/240518.240633 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Massimilano Chiodo , Paolo Giusto , Attila Jurecska , Harry C. Hsieh , Alberto Sangiovanni-Vincentelli , Luciano Lavagno, Hardware-Software Codesign of Embedded Systems, IEEE Micro, v.14 n.4, p.26-36, August 1994 [doi>10.1109/40.296155]
	2	Massimiliano Chiodo , Paolo Guisto , Attila Jurecska , Luciano Lavagno , Ellen Sentovich , Harry Hsieh , Kei Suzuki , Alberto Sangiovanni-Vincentelli, Synthesis of software programs for embedded control application, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.587-592, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217594]
	3	E Kligerman , A D Stoyenko, Real-time Euclid: a language for reliable real-time systems, IEEE Transactions on Software Engineering, v.12 n.9, p.941-949, Sept. 1986
	4	P. Puschner , Ch. Koza, Calculating the maximum, execution time of real-time programs, Real-Time Systems, v.1 n.2, p.159-176, Sep. 1989 [doi>10.1007/BF00571421]
	5	Chang Yun Park, Predicting program execution times by analyzing static and dynamic program paths, Real-Time Systems, v.5 n.1, p.31-62, March 1993 [doi>10.1007/BF01088696]
	6	Yau-Tsun Steven Li , Sharad Malik, Performance analysis of embedded software using implicit path enumeration, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.456-461, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217570]
	7	T.E. Smith and D. E. Setliff, "Towards an Automatic Synthesis System for Real-Time Software", In Proc. of 12th Real-Time Systems Symposium, pp.34-42, 1991.
	8	Joseph G. D'Ambrosio , Xiaobo (Sharon) Hu, Configuration-level hardware/software partitioning for real-time embedded systems, Proceedings of the 3rd international workshop on Hardware/software co-design, September 22-24, 1994, Grenoble, France
	9	W. Wolf and J. C. Martinez, "C Program Performance Estimation for Embedded Systems Architecture Sizing", In Proc. of Int. Workshop Hardware/Software Codesign, Oct.1993.
	10	W. Hardt and R. Camposano, "Trade-Offs in HW/SW Codesign", In Proc.of Int. Workshop on Hardware/Software Codesign, Oct. 1993.
	11	Rajesh K. Gupta , Giovanni De Micheli, Constrained software generation for hardware-software systems, Proceedings of the 3rd international workshop on Hardware/software co-design, September 22-24, 1994, Grenoble, France
	12	W. Ye, R. Ernst, Th. Benner and J. Henkel, "Fast Timing Analysis for Hardware/Software Co-synthesis", In Proc. of ICCD, pp.452-457, Oct. 1993.
	13	T. Kam and R. Brayton, "Multi-valued Decision Diagram", Technical Report UCB/ERL M90/125, U.C.Berkeley, 1990.
	14	M68HC11 Reference Manual, Motorola, 1989.

CITED BY 26

	Marcello Lajolo , Anand Raghunathan , Sujit Dey , Luciano Lavagno , Alberto Sangiovanni-Vincentelli, A case study on modeling shared memory access effects during performance analysis of HW/SW systems, Proceedings of the 6th international workshop on Hardware/software codesign, p.117-121, March 15-18, 1998, Seattle, Washington, United States
	Felice Balarin, Automatic abstraciton for worst-case analysis of discrete systems, Proceedings of the conference on Design, automation and test in Europe, p.494-501, March 27-30, 2000, Paris, France
	C. Brandolese , W. Fornaciari , F. Salice , D. Sciuto, Source-level execution time estimation of C programs, Proceedings of the ninth international symposium on Hardware/software codesign, p.98-103, April 2001, Copenhagen, Denmark
	P. Giusto , G. Martin , E. Harcourt, Reliable estimation of execution time of embedded software, Proceedings of the conference on Design, automation and test in Europe, p.580-589, March 2001, Munich, Germany
	Sujit Dey , Surendra Bommu, Performance analysis of a system of communicating processes, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.590-597, November 09-13, 1997, San Jose, California, United States
	Marcello Lajolo , Mihai Lazarescu , Alberto Sangiovanni-Vincentelli, A compilation-based software estimation scheme for hardware/software co-simulation, Proceedings of the seventh international workshop on Hardware/software codesign, p.85-89, March 1999, Rome, Italy
	Jong-Yeol Lee , In-Cheol Park, Timed compiled-code simulation of embedded software for performance analysis of SOC design, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Luigi Carro , Márcio Kreutz , Flávio R. Wagner , Márcio Oyamada, System synthesis for multiprocessor embedded applications, Proceedings of the conference on Design, automation and test in Europe, p.697-702, March 27-30, 2000, Paris, France
	Jwahar R. Bammi , Wido Kruijtzer , Luciano Lavagno , Edwin Harcourt , Mihai T. Lazarescu, Software performance estimation strategies in a system-level design tool, Proceedings of the eighth international workshop on Hardware/software codesign, p.82-86, May 2000, San Diego, California, United States
	Claudio Passerone , Luciano Lavagno , Massimiliano Chiodo , Alberto Sangiovanni-Vincentelli, Fast hardware/software co-simulation for virtual prototyping and trade-off analysis, Proceedings of the 34th annual conference on Design automation, p.389-394, June 09-13, 1997, Anaheim, California, United States
	Stephen Edwards , Luciano Lavagno , Edward A. Lee , Alberto Sangiovanni-Vincentelli, Design of embedded systems: formal models, validation, and synthesis, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	Andre Chatelain , Yves Mathys , Giovanni Placido , Alberto La Rosa , Luciano Lavagno, High-level architectural co-simulation using Esterel and C, Proceedings of the ninth international symposium on Hardware/software codesign, p.189-194, April 2001, Copenhagen, Denmark
	Jie Liu , Marcello Lajolo , Alberto Sangiovanni-Vincentelli, Software timing analysis using HW/SW cosimulation and instruction set simulator, Proceedings of the 6th international workshop on Hardware/software codesign, p.65-69, March 15-18, 1998, Seattle, Washington, United States
	Radu Marculescu , Amit Nandi , Luciano Lavagno , Alberto Sangiovanni-Vincentelli, System-level power/performance analysis of portable multimedia systems communicating over wireless channels, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	Wolfgang Müller , Wolfgang Rosenstiel , Jürgen Ruf, References, SystemC: methodologies and applications, Kluwer Academic Publishers, Norwell, MA, 2003
	P. Eles , K. Kuchcinski , Z. Peng , A. Doboli , P. Pop, Scheduling of conditional process graphs for the synthesis of embedded systems, Proceedings of the conference on Design, automation and test in Europe, p.132-139, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Jeffry T. Russell , Margarida F. Jacome, Architecture-level performance evaluation of component-based embedded systems, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Yves Mathys , André Châtelain, Verification strategy for integration 3G baseband SoC, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Amer Baghdadi , Nacer-Eddine Zergainoh , Wander O. Cesário , Ahmed Amine Jerraya, Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems, IEEE Transactions on Software Engineering, v.28 n.9, p.822-831, September 2002
	Hans-Joachim Stolberg , Mladen Bereković , Peter Pirsch, A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications, Journal of VLSI Signal Processing Systems, v.41 n.2, p.139-151, September 2005
	Juha-Pekka Soininen , Jari Kreku , Yang Qu , Martti Forsell, Fast processor core selection for WLAN modem using mappability estimation, Proceedings of the tenth international symposium on Hardware/software codesign, May 06-08, 2002, Estes Park, Colorado
	Jeffry T. Russell , Margarida F. Jacome, Scenario-based software characterization as a contingency to traditional program profiling, Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, October 08-11, 2002, Grenoble, France
	Shobana Padmanabhan , Phillip Jones , David V. Schuehler , Scott J. Friedman , Praveen Krishnamurthy , Huakai Zhang , Roger Chamberlain , Ron K. Cytron , Jason Fritts , John W. Lockwood, Extracting and improving microarchitecture performance on reconfigurable architectures, International Journal of Parallel Programming, v.33 n.2, p.115-136, June 2005
	Bassam Tabbara , Enrica Filippi , Luciano Lavagno, Fast hardware-software co-simulation using VHDL models, Proceedings of the conference on Design, automation and test in Europe, p.64-es, January 1999, Munich, Germany
	Luciano Lavagno , Claudio Passerone , Vishal Shah , Yosinori Watanabe, A Time Slice Based Scheduler Model for System Level Design, Proceedings of the conference on Design, Automation and Test in Europe, p.378-383, March 07-11, 2005
	Trevor Meyerowitz , Alberto Sangiovanni-Vincentelli , Mirko Sauermann , Dominik Langen, Source-level timing annotation and simulation for a heterogeneous multiprocessor, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany