Using register-transfer paths in code generation for heterogeneous memory-register architectures

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Using register-transfer paths in code generation for heterogeneous memory-register architectures

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 591 - 596

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Guido Araujo	Department of Electrical Engineering, Princeton University, Princeton, NJ
Sharad Malik	Department of Electrical Engineering, Princeton University, Princeton, NJ
Mike Tien-Chien Lee	Fujitsu Laboratories of America, San Jose, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 10, Citation Count: 19

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	3	Dirk Lanneer , Marco Cornero , Gert Goossens , Hugo De Man, Data routing: a paradigm for efficient data-path synthesis and code generation, Proceedings of the 7th international symposium on High-level synthesis, p.17-22, May 18-20, 1994, Niagra-on-the-Lake, Ontario, Canada
	4	Texas Instruments, Inc. Digital Signal Processing Applications with the TMS320 Family, 1990.
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	6	Guido Araujo , Sharad Malik, Optimal code generation for embedded memory non-homogeneous register architectures, Proceedings of the 8th international symposium on System synthesis, p.36-41, September 13-15, 1995, Cannes, France [doi>10.1145/224486.224493]
	7	Michael R. Garey , David S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness, W. H. Freeman & Co., New York, NY, 1979
	8	V. Zivojnovic, J.M. Velarde, and C. Scl~ger. DSPstone, a DSP benchmarking methodology. Technical report, Aachen University of Thecnology, August 1994.

CITED BY 19

	Guido Araujo , Sharad Malik, Code generation for fixed-point DSPs, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.3 n.2, p.136-161, April 1998
	Amit Rao , Santosh Pande, Storage assignment optimizations to generate compact and efficient code on embedded DSPs, ACM SIGPLAN Notices, v.34 n.5, p.128-138, May 1999
	Wei-Kai Cheng , Youn-Long Lin, Code generation of nested loops for DSP processors with heterogeneous registers and structural pipelining, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.4 n.3, p.231-256, July 1999
	Hoon Choi , Seung Ho Hwang , Chong-Min Kyung , In-Cheol Park, Synthesis of application specific instructions for embedded DSP software, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.665-671, November 08-12, 1998, San Jose, California, United States
	Steven Bashford , Rainer Leupers, Constraint driven code selection for fixed-point DSPs, Proceedings of the 36th ACM/IEEE conference on Design automation, p.817-822, June 21-25, 1999, New Orleans, Louisiana, United States
	Ashok Sudarsanam , Sharad Malik, Simultaneous reference allocation in code generation for dual data memory bank ASIPs, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.2, p.242-264, April 2000
	Rainer Leupers, Register allocation for common subexpressions in DSP data paths, Proceedings of the 2000 conference on Asia South Pacific design automation, p.235-240, January 2000, Yokohama, Japan
	Giovanni De Micheli , Rajesh K. Gupta, Hardware/software co-design, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	Rainer Leupers, Code selection for media processors with SIMD instructions, Proceedings of the conference on Design, automation and test in Europe, p.4-8, March 27-30, 2000, Paris, France
	Rainer Leupers, Code generation for embedded processors, Proceedings of the 13th international symposium on System synthesis, September 20-22, 2000, Madrid, Spain
	Catherine H. Gebotys, An efficient model for DSP code generation: performance, code size, estimated energy, Proceedings of the 10th international symposium on System synthesis, p.41-47, September 17-19, 1997, Antwerp, Belgium
	Qin Zhao , Bart Mesman , Twan Basten, Static resource models for code-size efficient embedded processors, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.2, p.219-250, May 2003
	Q. Zhao , T. Basten , B. Mesman , C. A. J. van Eijk , J. A. G. Jess, Static resource models of instruction sets, Proceedings of the 14th international symposium on Systems synthesis, September 30-October 03, 2001, Montréal, P.Q., Canada
	Graph-based code selection techniques for embedded processors, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.4, p.794-814, Oct. 2000
	Hoon Choi , Jong-Sun Kim , Chi-Won Yoon , In-Cheol Park , Seung Ho Hwang , Chong-Min Kyung, Synthesis of Application Specific Instructions for Embedded DSP Software, IEEE Transactions on Computers, v.48 n.6, p.603-614, June 1999
	Rainer Leupers, Exploiting conditional instructions in code generation for embedded VLIW processors, Proceedings of the conference on Design, automation and test in Europe, p.23-es, January 1999, Munich, Germany
	Hanno Scharwaechter , Jonghee M. Youn , Rainer Leupers , Yunheung Paek , Gerd Ascheid , Heinrich Meyr, A code-generator generator for multi-output instructions, Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis, September 30-October 03, 2007, Salzburg, Austria
	Guido Araujo , Ashok Sudarsanam , Sharad Malik, Instruction Set Design and Optimizations for Address Computation in DSP Architectures, Proceedings of the 9th international symposium on System synthesis, p.105, November 06-08, 1996
	Markus Lorenz , Peter Marwedel, Phase Coupled Code Generation for DSPs Using a Genetic Algorithm, Proceedings of the conference on Design, automation and test in Europe, p.21270, February 16-20, 2004