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ICET: a complete chip-level thermal reliability diagnosis tool for CMOS VLSI chips

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 548 - 551

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Yi-Kan Cheng	Coordinated Science Laboratory, 1308 West Main Street, Univ. of Illinois at Urbana-Champaign, Urbana, IL
Chin-Chi Teng	Coordinated Science Laboratory, 1308 West Main Street, Univ. of Illinois at Urbana-Champaign, Urbana, IL
Abhijit Dharchoudhury	High Performance Design Technologies, Motorola Inc., 6501 William Cannon Drive West, Austin, TX
Elyse Rosenbaum	Coordinated Science Laboratory, 1308 West Main Street, Univ. of Illinois at Urbana-Champaign, Urbana, IL
Sung-Mo Kang	Coordinated Science Laboratory, 1308 West Main Street, Univ. of Illinois at Urbana-Champaign, Urbana, IL

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 10, Citation Count: 3

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	S. S. Lee and D. J. Allstot, "Electrothermal Simulation of Integrated Circuits," IEEE J. Solid-State Circuits, pp. 1283-1293, Dec. 1993.
	2	C. H. Diaz, S. M. Kang, and C. Duvvury, "Circuit-Level Electrothermal Simulation of Electrical Overstress Failures in Advanced MOS I/O Protection Devices," IEEE Trans. Computer-Aided Design, pp. 482-493, Apr. 1994.
	3	Vladimir Koval , Igor W. Farmaga , Andrzej J. Strojwas , Stephen W. Director, MONSTR: a complete thermal simulator of electronic systems, Proceedings of the 31st annual conference on Design automation, p.570-575, June 06-10, 1994, San Diego, California, United States [doi>10.1145/196244.196559]
	4	A. Dharchoudhury , S. M. Kang , K. H. Kim , S. H. Lee, Fast and accurate timing simulation with regionwise quadratic models of MOS I-V characteristics, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.190-194, November 06-10, 1994, San Jose, California, United States
	5	M.N. Ozisik, Boundary Value Problems of Heat Conduction, London, U.K. Oxford, 1968.
	6	J. F. Thompson, Z. Warsi, and C. W. Mastin, Numerical Grid Generation, North-Holland, 1985.
	7	Microelectronics Center for North Carolina, VPNR Users Guide.

CITED BY 3

	Ching-Han Tsai , Sung-Mo (Steve) Kang, Standard cell placement for even on-chip thermal distribution, Proceedings of the 1999 international symposium on Physical design, p.179-184, April 12-14, 1999, Monterey, California, United States
	Tong Li , Ching-Han Tsai , Sung-Mo Steve Kang, Efficient transient electrothermal simulation of CMOS VLSI circuits under electrical overstress, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.6-11, November 08-12, 1998, San Jose, California, United States
	Amir H. Ajami , Kaustav Banerjee , Massoud Pedram , Lukas P. P. P. van Ginneken, Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs, Proceedings of the 38th conference on Design automation, p.567-572, June 2001, Las Vegas, Nevada, United States