A new hybrid methodology for power estimation

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A new hybrid methodology for power estimation

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 439 - 444

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

David Ihsin Cheng	Dept. of Electrical and Computer Engineering, Univ. of California, Santa Barbara, CA
Kwang-Ting Cheng
Deborah C. Wang	LSI Logic Corp., Milpitas, CA
Malgorzata Marek-Sadowska	Dept. of Electrical and Computer Engineering, Univ. of California, Santa Barbara, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 9, Citation Count: 5

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	R.Burch, F.N. Najm, P.Yang, and T.N.Trick, "A Monte Carlo Approach for Power Estimation", IEEE Tran. on VLSI, Mar. 1993, pp. 63-71.
	2	David I. Cheng, M. Marek-Sadowska, and K.T. Cheng, "Speeding Up Power Estimation by Topological Analysis," Proc. CICC-95, pp.623-626.
	3	David I. Cheng, K.T. Cheng, D.C. Wang, and M. Marek- Sadowska, "A Hybrid Methodology for Power Estimation," Tech Report, ECE Dept., UC, Santa Barbara.
	4	A. Ghosh , S. Devadas , K. Keutzer , J. White, Estimation of average switching activity in combinational and sequential circuits, Proceedings of the 29th ACM/IEEE conference on Design automation, p.253-259, June 08-12, 1992, Anaheim, California, United States
	5	Radu Marculescu , Diana Marculescu , Massoud Pedram, Switching activity analysis considering spatiotemporal correlations, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.294-299, November 06-10, 1994, San Jose, California, United States
	6	J.Monteiro, S.Devadas, B.Lin, C.Tsui, and M.Pedram, "Exact and Approximate Methods of Switching Activity Estimation in Sequential Logic Circuits," Proc. Int. Work- ~ h~p on Low Power Design, pp. 117-122, Apr. 1994.
	7	Farid N. Najm, Transition density, a stochastic measure of activity in digital circuits, Proceedings of the 28th conference on ACM/IEEE design automation, p.644-649, June 17-22, 1991, San Francisco, California, United States [doi>10.1145/127601.127744]
	8	E.Sentovich et al., "SIS:A System for Sequential Circuit Synthesis" Memo. UCB/ERL M92/41, UC, Berkeley.
	9	S.C.Seth, B.B.Bhattacharya, V.D.Agrawal, "An exact analysis for efficient computation of random pattern testability in combinational circuits," Proc. Fault-Tolerant Comput. Symp., pp. 318-323, 1986.
	10	Chi-Ying Tsui , Massoud Pedram , Alvin M. Despain, Efficient estimation of dynamic power consumption under a real delay model, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.224-228, November 07-11, 1993, Santa Clara, California, United States
	11	Michael G. Xakellis , Farid N. Najm, Statistical estimation of the switching activity in digital circuits, Proceedings of the 31st annual conference on Design automation, p.728-733, June 06-10, 1994, San Diego, California, United States [doi>10.1145/196244.196628]

CITED BY 5

	Jing-Jia Liou , Kwang-Ting Cheng , Sandip Kundu , Angela Krstic, Fast statistical timing analysis by probabilistic event propagation, Proceedings of the 38th conference on Design automation, p.661-666, June 2001, Las Vegas, Nevada, United States
	Anand Raghunathan , Sujit Dey , Niraj K. Jha, High-level macro-modeling and estimation techniques for switching activity and power consumption, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.4, p.538-557, August 2003
	Shi-Yu Huang , Kuang-Chien Chen , Kwang-Ting Cheng , Tien-Chien Lee, Compact vector generation for accurate power simulation, Proceedings of the 33rd annual conference on Design automation, p.161-164, June 03-07, 1996, Las Vegas, Nevada, United States
	Tun Li , Yang Guo , Si-Kun Li, Automatic circuit extractor for HDL description using program slicing, Journal of Computer Science and Technology, v.19 n.5, p.718-728, September 2004
	Chien-Nan Jimmy Liu , Jing-Yang Jou, An Automatic Controller Extractor for HDL Descriptions at the RTL, IEEE Design & Test, v.17 n.3, p.72-77, July 2000