Compact vector generation for accurate power simulation

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Compact vector generation for accurate power simulation

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 161 - 164

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Shi-Yu Huang	Dept. of Electrical & Computer Engineering, Univ. of California, Santa Barbara, Santa Barbara, CA
Kuang-Chien Chen	Fujitsu Labs of America, 3350 Scott Blvd. Bldg. 34, Santa Clara, CA
Kwang-Ting Cheng	Dept. of Electrical & Computer Engineering, Univ. of California, Santa Barbara, Santa Barbara, CA
Tien-Chien Lee	Fujitsu Labs of America, 3350 Scott Blvd. Bldg. 34, Santa Clara, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 15, Citation Count: 7

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	M.A. Cirit, "Estimating Dynamic Power Consumption of CMOS Circuits," Proceedings of ICCAD, pp. 534-537, Nov. 1987.
	2	S.M. Kang, "Accurate Simulation of Power Dissipation in VLSI Circuits," IEEE Journal of Solid State Circuits, vol. SC-21, no. 5, pp. 889-891, Oct. 1986.
	3	A.C. Deng, Y. C. Shiau, and K. H. Lob, "Time Domain Current Waveform Simulation of CMOS Circuits," Proceedings of ICCAD, pp. 208-211, Nov. 1988.
	4	G.Y. Yacoub, and W. H. Ku, "An Accurate Simulation Technique for Short-Circuit Power Dissipation Based on Current Component Isolation," IEEE International Symposium on Circuits and Systems, pp. 1157-1161, 1989.
	5	F. Najm, "Transition Density: A Stochastically Measure of Activity in Digital Circuits," Proceedings of the Custom Integrated Circuits Conference (CICC), pp. 19.7.1-10.7.6, May 1990.
	6	A. Ghosh , S. Devadas , K. Keutzer , J. White, Estimation of average switching activity in combinational and sequential circuits, Proceedings of the 29th ACM/IEEE conference on Design automation, p.253-259, June 08-12, 1992, Anaheim, California, United States
	7	Amelia Shen , Abhijit Ghosh , Srinivas Devadas , Kurt Keutzer, On average power dissipation and random pattern testability of CMOS combinational logic networks, Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design, p.402-407, November 1992, Santa Clara, California, United States
	8	Richard Burch , Farid Najm , Ping Yang , Timothy Trick, McPOWER: a Monte Carlo approach to power estimation, Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design, p.90-97, November 1992, Santa Clara, California, United States
	9	Chi-Ying Tsui , Massoud Pedram , Alvin M. Despain, Efficient estimation of dynamic power consumption under a real delay model, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.224-228, November 07-11, 1993, Santa Clara, California, United States
	10	Anthony M. Hill , Sung-Mo Steve Kang, Determining accuracy bounds for simulation-based switching activity estimation, Proceedings of the 1995 international symposium on Low power design, p.215-220, April 23-26, 1995, Dana Point, California, United States [doi>10.1145/224081.224119]
	11	José Monteiro , Srinivas Devadas, Techniques for the power estimation of sequential logic circuits under user-specified input sequences and programs, Proceedings of the 1995 international symposium on Low power design, p.33-38, April 23-26, 1995, Dana Point, California, United States [doi>10.1145/224081.224088]
	12	D. I. Cheng, M. Marek-Sadowska, and K.-T. Cheng, "Speeding Up Power Estimation by Topological Analysis," Proceedings of Custom Integrated Circuit Conference (CICC), pp. 623-626, May 1995.
	13	David Ihsin Cheng , Kwang-Ting Cheng , Deborah C. Wang , Malgorzata Marek-Sadowska, A new hybrid methodology for power estimation, Proceedings of the 33rd annual conference on Design automation, p.439-444, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240602]
	14	PowerMill Reference Manual, Version 2.7.1, EPIC Design Technology, Aug. 1992.

CITED BY 7

	Ali Pinar , C. L. Liu, Power invariant vector sequence compaction, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.473-476, November 08-12, 1998, San Jose, California, United States
	Rajat Chaudhry , David Blaauw , Rajendran Panda , Tim Edwards, Current signature compression for IR-drop analysis, Proceedings of the 37th conference on Design automation, p.162-167, June 05-09, 2000, Los Angeles, California, United States
	S. Huang , K. Cheng , K. Chen , T. Lee, A novel methodology for transistor-level power estimation, Proceedings of the 1996 international symposium on Low power electronics and design, p.67-72, August 12-14, 1996, Monterey, California, United States
	Radu Marculescu , Diana Marculescu , Massoud Pedram, Hierarchical sequence compaction for power estimation, Proceedings of the 34th annual conference on Design automation, p.570-575, June 09-13, 1997, Anaheim, California, United States
	Ali Pinar , C. L. Liu, Compacting sequences with invariant transition frequencies, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.8 n.2, p.214-221, April 2003
	Jo Dale Carothers , Radjakichenin Radjassamy, Low Power VLSI Design Techniques - The Current State, Integrated Computer-Aided Engineering, v.5 n.2, p.153-176, April 1998
	Hedi Harizi , Robert Häußler , Markus Olbrich , Erich Barke, Efficient modeling techniques for dynamic voltage drop analysis, Proceedings of the 44th annual conference on Design automation, June 04-08, 2007, San Diego, California