Verification of electronic systems

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Verification of electronic systems

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 106 - 111

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Alberto L. Sangiovanni-Vincentelli	University of California - Berkeley CA
Patrick C. McGeer	Cadence Berkeley Laboratories - Berkeley CA
Alexander Saldanha	Cadence Berkeley Laboratories - Berkeley CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 17, Citation Count: 10

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	L. Augustin. An algebra of waveforms. Technical Report, Computer Systems Laboratory, Stanford University, 1989.
	2	Felice Balarin , Harry Hsieh , Attila Jurecska , Luciano Lavagno , Alberto Sangiovanni-Vincentelli, Formal verification of embedded systems based on CFSM networks, Proceedings of the 33rd annual conference on Design automation, p.568-571, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240626]
	3	G. Berry, E Couronn6, and G. Gonthier. The synchronous approach to reactive and real-time systems. IEEE Proceedings, 79, September 1991.
	4	Daniel Brand, Verification of large synthesized designs, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.534-537, November 07-11, 1993, Santa Clara, California, United States
	5	Randal E. Bryant, Graph-based algorithms for Boolean function manipulation, IEEE Transactions on Computers, v.35 n.8, p.677-691, Aug. 1986 [doi>10.1109/TC.1986.1676819]
	6	R. E. Bryant , D. Beatty , K. Brace , K. Cho , T. Sheffler, COSMOS: a compiled simulator for MOS circuits, Proceedings of the 24th ACM/IEEE conference on Design automation, p.9-16, June 28-July 01, 1987, Miami Beach, Florida, United States [doi>10.1145/37888.37890]
	7	J. Buck, S. Ha, E. Lee, and D. Messerschmitt. Ptolemy: a framework for simulating and prototyping heterogeneous systems. Interntional Journal of Computer Simulation, special issue on Simulation Software Development, January 1990.
	8	Jerry R. Burch, Techniques for verifying superscalar microprocessors, Proceedings of the 33rd annual conference on Design automation, p.552-557, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240623]
	9	Anantha P. Chandrakasan , Robert W. Brodersen, Low Power Digital CMOS Design, Kluwer Academic Publishers, Norwell, MA, 1995
	10	Massimiliano Chiodo , Thomas R. Shiple , Alberto L. Sangiovanni-Vincentelli , Robert K. Brayton, Automatic compositional minimization in CTL model checking, Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design, p.172-178, November 1992, Santa Clara, California, United States
	11	Edmund M. Clarke , Orna Grumberg , David E. Long, Model checking and abstraction, Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages, p.343-354, January 19-22, 1992, Albuquerque, New Mexico, United States [doi>10.1145/143165.143235]
	12	E. Clarke , D. Long , K. McMillan, Compositional model checking, Proceedings of the Fourth Annual Symposium on Logic in computer science, p.353-362, June 1989, Pacific Grove, California, United States
	13	Robert P. Kurshan, Computer-aided verification of coordinating processes: the automata-theoretic approach, Princeton University Press, Princeton, NJ, 1994
	14	L. Lavagno, A. Sangiovanni-Vincentelli, and H. Hsieh. Models and algorithms for embedded system synthesis and validation. In G. De Micheli, editor, Nato Advanced Study Institute. Kluwer Academic Publisher, 1996.
	15	E McGeer, A. Saldanha, R. Brayton, and A. Sangiovanni- Vincentelli. Delay models and exact timing analysis. In T. Sasao, editor, Logic synthesis and optimization. Kluwer Academic Publishers, 1993.
	16	Kenneth L. McMillan, Symbolic Model Checking, Kluwer Academic Publishers, Norwell, MA, 1993
	17	H. Touati, H. Savoj, B. Lin, R. K. Brayton, and A. Sangiovanni-Vincentelli. Implicit state enumeration of finite state machines using bdd's. In Proceedings of the International Conference on Computer-Aided Design, 1990.

CITED BY 10

	Joshua Marantz, Enhanced visibility and performance in functional verification by reconstruction, Proceedings of the 35th annual conference on Design automation, p.164-169, June 15-19, 1998, San Francisco, California, United States
	Joon-Seo Yim , Yoon-Ho Hwang , Chang-Jae Park , Hoon Choi , Woo-Seung Yang , Hun-Seung Oh , In-Cheol Park , Chong-Min Kyung, A C-based RTL design verification methodology for complex microprocessor, Proceedings of the 34th annual conference on Design automation, p.83-88, June 09-13, 1997, Anaheim, California, United States
	Yael Abarbanel-Vinov , Neta Aizenbud-Reshef , Ilan Beer , Cindy Eisner , Daniel Geist , Tamir Heyman , Iris Reuveni , Eran Rippel , Irit Shitsevalov , Yaron Wolfsthal , Tali Yatzkar-Haham, On the Effective Deployment of Functional Formal Verification, Formal Methods in System Design, v.19 n.1, p.35-44, July 2001
	James A. Rowson , Alberto Sangiovanni-Vincentelli, Interface-based design, Proceedings of the 34th annual conference on Design automation, p.178-183, June 09-13, 1997, Anaheim, California, United States
	Dyson Wilkes , M. M. Kamal Hashmi, Application of high level interface-based design to telecommunications system hardware, Proceedings of the 36th ACM/IEEE conference on Design automation, p.778-783, June 21-25, 1999, New Orleans, Louisiana, United States
	G. Post , A. Müller , T. Grötker, A system-level co-verification environment for ATM hardware design, Proceedings of the conference on Design, automation and test in Europe, p.424-428, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Alon Gluska, Coverage-oriented verification of banias, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Joshua Marantz, Enhanced visibility and performance in functional verification by reconstruction, Proceedings of the 35th annual conference on Design automation, p.164-169, June 15-19, 1998, San Francisco, California, United States
	Laurent Fournier , Yaron Arbetman , Moshe Levinger, Functional verification methodology for microprocessors using the Genesys test-program generator, Proceedings of the conference on Design, automation and test in Europe, p.92-es, January 1999, Munich, Germany
	I. Gibson , C. Amies, Practical concurrent ASIC and system design and verification, Proceedings of the 1997 European conference on Design and Test, p.532, March 17-20, 1997