Espresso-HF

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Espresso-HF: a heuristic hazard-free minimizer for two-level logic

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 71 - 76

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Michael Theobald	Department of Computer Science, Columbia University, New York, NY
Steven M. Nowick	Department of Computer Science, Columbia University, New York, NY
Tao Wu	Department of Computer Science, Columbia University, New York, NY

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 7, Downloads (12 Months): 11, Citation Count: 2

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Robert King Brayton , Alberto L. Sangiovanni-Vincentelli , Curtis T. McMullen , Gary D. Hachtel, Logic Minimization Algorithms for VLSI Synthesis, Kluwer Academic Publishers, Norwell, MA, 1984
	2	Robert M. Fuhrer , Bill Lin , Steven M. Nowick, Symbolic hazard-free minimization and encoding of asynchronous finite state machines, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.604-611, November 05-09, 1995, San Jose, California, United States
	3	Alan Marshall , Polly Siegel , Bill Coates, Designing an Asynchronous Communications Chip, IEEE Design & Test, v.11 n.2, p.8-21, April 1994 [doi>10.1109/54.282441]
	4	G. De Micheli, R. K. Brayton, A. Sangiovanni-Vincentelli. Optimal state assignment for finite state machines. IEEE TCAD, CAD-4(3):269-285, July 1985.
	5	Steven M. Nowick , David L. Dill, Synthesis of Asynchronous State Machines Using A Local Clock, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.192-197, October 14-16, 1991
	6	Steven M. Nowick , Bill Coates, UCLOCK: Automated Design of High-Peformance Unclocked State Machines, Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, p.434-441, October 10-12, 1994
	7	S.M. Nowick, M.E. Dean, D.L. Dill, and M. Horowitz. The design of a highperformance cache controller: a case study in asynchronous synthesis. In HICSS- 1993.
	8	S. M. Nowick , N. K. Jha , Fu-Chiung Cheng, Synthesis of asynchronous circuits for stuck-at and robust path delay fault testability, Proceedings of the 8th International Conference on VLSI Design, p.171, January 04-07, 1995
	9	S.M. Nowick and D.L. Dill. Exact two-level minimization of hazard-tree logic with multiple-input changes. IEEE TCAD, CAD- 14(8):986-997, August 1995.
	10	R. Rudell and A. SangiovanniVincentelli. Multiple valued minimization for PLA optimization. IEEE TCAD, CAD-6(5):727-750, September 1987.
	11	Stephen H. Unger, Asynchronous Sequential Switching Circuit, Krieger Publishing Co., Inc., Melbourne, FL, 1983
	12	Kenneth Y. Yun , David L. Dill, A high-performance asynchronous SCSI controller, Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors, p.44, October 02-04, 1995
	13	Kenneth Y. Yun , David L. Dill , Steven M. Nowick, Synthesis of 3D Asynchronous State Machines, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.346-350, October 11-14, 1992

CITED BY 2

	Erik Brunvand , Steven Nowick , Kenneth Yun, Practical advances in asynchronous design and in asynchronous/synchronous interfaces, Proceedings of the 36th ACM/IEEE conference on Design automation, p.104-109, June 21-25, 1999, New Orleans, Louisiana, United States
	J. W. J. M. Rutten , M. R. C. M. Berkelaar , C. A. J. van Eijk , M. A. J. Kolsteren, An efficient divide and conquer algorithm for exact hazard free logic minimization, Proceedings of the conference on Design, automation and test in Europe, p.749-754, February 23-26, 1998, Le Palais des Congrés de Paris, France