Early power exploration—a World Wide Web application

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Early power exploration—a World Wide Web application

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 27 - 32

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

David Lidsky	University of California, Berkeley
Jan M. Rabaey	University of California, Berkeley

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 4, Downloads (12 Months): 16, Citation Count: 17

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	O. Bentz et al,"Information-based Design Environment", IEEE VLSI Signal Processing VIII, pp. 237-246, Nov. 1995.
	2	T. Burd, Low-Power CMOS Library Design Methodology, Masters Thesis, Engineering Researh Laboratory, UC Berkeley, CA, June 1994.
	3	F. Catthoor et al, "Global Communication and Memory Optimizing Transformations for Low-Power Signal Processing Systems," IEEE VLSI Signal Processing, VII, pp. 178-187, 1994
	4	A. Chandrakasan, et al, "A Low-Power Chipset for Portable Multimedia Applications," ISSCC, March 1994.
	5	Anantha P. Chandrakasan , Robert W. Brodersen, Low Power Digital CMOS Design, Kluwer Academic Publishers, Norwell, MA, 1995
	6	W. Donath, "Placement and Average Interconnection Lengths of Computer Logic," IEEE Transactions on Circuits and Systems, Vol. CAS- 26, No. 4, pp. 272-277, April 1979.
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	9	Paul R. Gray , Robert G. Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, Inc., New York, NY, 1990
	10	K. Keutzer, et al, "The Impact of CAD on the Design of Low-Power Digital Circuits," IEEE Symposium on Low Power Electonics -Digest of Technical Papers, pp. 342-46, October, 1994
	11	B. Landman et al, "On a Pin Versus Block Relationship for Partitions of Logic Graphs," IEEE Transactions on Computing, vol. C-20, pp. 1469-1479, Dec. 1971.
	12	Paul Eric Landman, Low-power architectural design methodologies, University of California at Berkeley, Berkeley, CA, 1995
	13	D. Lidsky et al, "Low-Power Design of Memory Intensive Functions", IEEE VLSI Signal Processing, VII, pp. 378-387, 1994
	14	Maxim, "1994 New Releases Data Book Volume III," Section 4, 1994
	15	E Ong et al, "Power-Conscious Software Design - a framework for modeling software on hardware," IEEE Symposium on Low Power Electonics -Digest of Technical Papers, pp. 36-37, October, 1994
	16	S. Sheng et al, "A Portable Multimedia Terminal," IEEE Communications Magazine, pp. 64-75, December 1992.
	17	Mário J. Silva , Randy H. Katz, The case for design using the World Wide Web, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.579-585, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217593]
	18	C. Svensson et al, "Low Power Circuit Techniques," from "Low Power Design Methodologies", pp.37-64, Kluwer Academic Publishers, Boston, MA, 1996.
	19	Vivek Tiwari , Sharad Malik , Andrew Wolfe, Power analysis of embedded software: a first step towards software power minimization, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.2 n.4, p.437-445, Dec. 1994 [doi>10.1109/92.335012]
	20	H. Veendrick, "Short-Circuit Dissipation of Static CMOS Circuitry and It's Impact on the Design of Buffer Circuits," IEEE JSSC, vol.sc-19, pp. 468-473, August 1994.

CITED BY 17

	Marcello Dalpasso , Alessandro Bogliolo , Luca Benini , Michele Favalli, Virtual fault simulation of distributed IP-based designs, Proceedings of the conference on Design, automation and test in Europe, p.99-105, March 27-30, 2000, Paris, France
	Marcello Dalpasso , Alessandro Bogliolo , Luca Benini, Virtual simulation of distributed IP-based designs, Proceedings of the 36th ACM/IEEE conference on Design automation, p.50-55, June 21-25, 1999, New Orleans, Louisiana, United States
	Scott Hauck , Stephen Knol, Data security for Web-based CAD, Proceedings of the 35th annual conference on Design automation, p.788-793, June 15-19, 1998, San Francisco, California, United States
	Diederik Verkest , Julio Leao Da Silva Jr. , Chantal Ykman , Kris Croes , Miguel Miranda , Sven Wuytack , Francky Catthoor , Gjalt De Jong , Hugo De Man, Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management, Journal of VLSI Signal Processing Systems, v.21 n.3, p.185-194, July 1999
	Jerry Frenkil, Tools and methodologies for low power design, Proceedings of the 34th annual conference on Design automation, p.76-81, June 09-13, 1997, Anaheim, California, United States
	Paul Landman, High-level power estimation, Proceedings of the 1996 international symposium on Low power electronics and design, p.29-35, August 12-14, 1996, Monterey, California, United States
	Luca Benini , Marco Ferrero , Alberto Macii , Enrico Macii , Massimo Poncino, Supporting system-level power exploration for DSP applications, Proceedings of the 10th Great Lakes symposium on VLSI, p.17-22, March 02-04, 2000, Chicago, Illinois, United States
	Gangadhar Konduri , Anantha Chandrakasan, A framework for collaborative and distributed web-based design, Proceedings of the 36th ACM/IEEE conference on Design automation, p.898-903, June 21-25, 1999, New Orleans, Louisiana, United States
	Luca Benini , Robin Hodgson , Polly Siegel, System-level power estimation and optimization, Proceedings of the 1998 international symposium on Low power electronics and design, p.173-178, August 10-12, 1998, Monterey, California, United States
	J. Rabaey , M. Wan, An energy-conscious exploration methodology for reconfigurable DSPs, Proceedings of the conference on Design, automation and test in Europe, p.341-342, February 23-26, 1998, Le Palais des Congrés de Paris, France
	K. Masselos , P. Merakos , T. Stouraitis , C. E. Goutis, Trade-Off Analysis of a Low-Power Image Coding Algorithm, Journal of VLSI Signal Processing Systems, v.18 n.1, p.65-80, Jan. 1998
	Marcello Dalpasso , Alessandro Bogliolo , Luca Benini, Virtual Simulation of Distributed IP-Based Designs, IEEE Design & Test, v.19 n.5, p.92-104, September 2002
	N. Julien , S. Gailhard , E. Martin, Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT, Journal of VLSI Signal Processing Systems, v.35 n.2, p.195-211, September 2003
	Reinaldo A. Bergamaschi , Yunjian W. Jiang, State-based power analysis for systems-on-chip, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Luca Benini , Giovanni de Micheli, System-level power optimization: techniques and tools, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.2, p.115-192, April 2000
	Marcello Dalpasso , Alessandro Bogliolo , Luca Benini, Specification and validation of disstributed IP-based designs with JavaCAD, Proceedings of the conference on Design, automation and test in Europe, p.132-es, January 1999, Munich, Germany
	Marlene Wan , Hui Zhang , Varghese George , Martin Benes , Arthur Abnous , Vandana Prabhu , Jan Rabaey, Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System, Journal of VLSI Signal Processing Systems, v.28 n.1-2, p.47-61, May-June 2001