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The GLOW cache coherence protocol extensions for widely shared data
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Source International Conference on Supercomputing archive
Proceedings of the 10th international conference on Supercomputing table of contents
Philadelphia, Pennsylvania, United States
Pages: 35 - 43  
Year of Publication: 1996
ISBN:0-89791-803-7
Authors
Stefanos Kaxiras  Computer Sciences Department, University of Wisconsin-Madison 1210 W. Dayton St., Madison, WI
James R. Goodman  Computer Sciences Department, University of Wisconsin-Madison 1210 W. Dayton St., Madison, WI
Sponsor
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 3,   Downloads (12 Months): 17,   Citation Count: 7
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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J.L. Baer and W. H. Wang, "Architectural Choices for Multi-Level Cache Hierarchies." Proceedings 16th International Conference on Parallel Processing, pp. 258-261, 1987.
 
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R. Bianchini and T. J, LeBlanc, "Eager Combining: A Coherency Protocol for Increasing Effective Network and Memory Bandwidth in Shared-Memory Multiprocessors." Proceedings of the 6th Symposium on Parallel and Distributed Processing, October 1994.
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Kourosh Gharachorloo, $arita V. Adve, Anoop Gupta, John L. Hennessy, and Mark D. Hill, "Programming for Different Memory Consistency. Models." Journal of Parallel and Distributed Computing, 15(4), 1992.
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A. Gottlieb, R. Grishman, C.P. Kmskal, K.P. McAuliffe, L. Rudolph, M. Snir, "The NYU Ultracomputer Designing a MIMD Shared-Memory Parallel Computer." IEEE Transactions on Computers, Vol. C-32, no 2, pp. 175-189, February 1983.
 
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IEEE Standard for Scalable Coherent Interface (SCl) 1596-1992, H~E~ 1993.
 
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Ross E. Johnson, James R.Goodrnan, "Interconnect Topologies with Point-to-Point Rings," Proc. of the International Conference on Parallel Processing, August 1992.
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S. Kaxiras and J. R. Goodman, "The GLOW Cache Coherence Extensions for Widely Shared Data." University of Wisconsin-Madison, C.S. Dept., Technical Report 1305, March 1996. (ftp.cs.wisc.edu)
 
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Leslie Lamport, "How to Make a Multiprocessor Computer that Cor- ~'~tly Executes Multiprocess Programs." IEEE Transactions on Computers, C-28(9):690-691, September 1979.
 
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Htkan Nilsson, Per StenstriSm, "The Scalable Tree Protocol--a Cache Coherence Approach for large-Scale Mulfiprocessors." 4th IEEE Symposium on Parallel and Distributed Processing, pp. 498-506, 1992.
 
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Gregory F. Plister and V. Alan Norton, "'Hot Spot' Contention and Combining in Multistage lnterconnection Netwofics." Proceedings of the 1985 International Conference on Parallel Processing, pp. 790- 797, August 20-23, 1985.
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CITED BY  7

Collaborative Colleagues:
Stefanos Kaxiras: colleagues
James R. Goodman: colleagues