| Using hybrid branch predictors to improve branch prediction accuracy in the presence of context switches |
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International Symposium on Computer Architecture
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Proceedings of the 23rd annual international symposium on Computer architecture
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Philadelphia, Pennsylvania, United States
Pages: 3 - 11
Year of Publication: 1996
ISBN:0-89791-786-3
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Authors
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Marius Evers
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Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor, Michigan
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Po-Yung Chang
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Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor, Michigan
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Yale N. Patt
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Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor, Michigan
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Downloads (6 Weeks): 14, Downloads (12 Months): 67, Citation Count: 27
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ABSTRACT
Pipeline stalls due to conditional branches represent one of the most significant impediments to realizing the performance potential of deeply pipelined, superscalar processors. Many branch predictors have been proposed to help alleviate this problem, including the Two-Level Adaptive Branch Predictor, and more recently, two-component hybrid branch predictors.In a less idealized environment, such as a time-shared system, code of interest involves context switches. Context switches, even at fairly large intervals, can seriously degrade the performance of many of the most accurate branch prediction schemes. In this paper, we introduce a new hybrid branch predictor and show that it is more accurate (for a given cost) than any previously published scheme, especially if the branch histories are periodically flushed due to the presence of context switches.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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P. Chang and U. Banerjee, "Profile-guided Multiheuristic Branch Prediction", Proceedings of the International Conference on Parallel Processing, July, 1995.
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Po-Yung Chang , Eric Hao , Tse-Yu Yeh , Yale Patt, Branch classification: a new mechanism for improving branch predictor performance, Proceedings of the 27th annual international symposium on Microarchitecture, p.22-31, November 30-December 02, 1994, San Jose, California, United States
[doi> 10.1145/192724.192727]
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Po-Ying Chang , Eric Hao , Yale N. Patt, Alternative implementations of hybrid branch predictors, Proceedings of the 28th annual international symposium on Microarchitecture, p.252-257, November 29-December 01, 1995, Ann Arbor, Michigan, United States
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Stuart Sechrest , Chih-Chieh Lee , Trevor Mudge, The role of adaptivity in two-level adaptive branch prediction, Proceedings of the 28th annual international symposium on Microarchitecture, p.264-269, November 29-December 01, 1995, Ann Arbor, Michigan, United States
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CITED BY 27
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Ravi Bhargava , Juan Rubio , Srikanth Kannan , Lizy K. John , David Christie , Leo Klaes, Understanding the impact of X86/NT computing on microarchitecture, Workload characterization of emerging computer applications, Kluwer Academic Publishers, Norwell, MA, 2001
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Edwin Naroska , Shanq-Jang Ruan , Chia-Lin Ho , Said Mchaalia , Feipei Lai , Uwe Schwiegelshohn, A novel approach for digital waveform compression, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
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Yale N. Patt , Sanjay J. Patel , Marius Evers , Daniel H. Friendly , Jared Stark, One Billion Transistors, One Uniprocessor, One Chip, Computer, v.30 n.9, p.51-57, September 1997
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