The wave pipeline effect on LUT-based FPGA architectures

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The wave pipeline effect on LUT-based FPGA architectures

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International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays table of contents

Monterey, California, United States

Pages: 45 - 50

Year of Publication: 1996

ISBN:0-89791-773-1

Authors

Eduardo I. Boemo	E.T.S.I. Telecomunicación. 28040 Ciudad Universitaria, Madrid, España
Sergio López-Buedo	E.T.S.I. Telecomunicación. 28040 Ciudad Universitaria, Madrid, España
Juan M. Meneses	E.T.S.I. Telecomunicación. 28040 Ciudad Universitaria, Madrid, España

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 3, Downloads (12 Months): 12, Citation Count: 0

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	Boe95	Eduardo I. Boemo , Guillermo González de Rivera , Sergio López-Buedo , Juan M. Meneses, Some Notes on Power Management on FPGA-Based Systems, Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications, p.149-157, September 01, 1995
	Bur94	W. Burleson, c. Lee and E. Tan, "A 150 MHz Wave Pipelined Adaptative Digital Filter in 2pm CMOS", VLSI Signal Proc. VII, Ed. J. Rabaey, pp.296-305. New York: IEEE Press, 1994.
	Cot65	L. Cotten, "Circuit Implementation of High-Speed Pipeline Systems", Proc. Fall Joint Computer Conference (AFIPS), 1965.
	Fly95	M. J. Flynn , K. Nowka , G. Bewick , E. Schwarz , N. Quach, The SNAP Project: Towards Sub-Nanosecond Arithmetic, Proceedings of the 12th Symposium on Computer Arithmetic, p.75, July 19-21, 1995
	Gho95	Debabrata Ghosh , S. K. Nandy, Design and realization of high-performance wave-pipelined 8 × 8 b multiplier in CMOS technology, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.3 n.1, p.36-48, March 1995 [doi>10.1109/92.365452]
	Gra93	C. Gray, W. Liu and R. Cavin, "Wave Pipelining: Theory and Implementation", Kluwer Academic Publishers, 1993.
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	Kla94	F. Klass and M. Flynn, "A 16xl6-bit Static CMOS Wave- Pipelined Multiplier", Proc. ISCAS 94 Conf., pp.143-146. IEEE Press 1994.
	Liu94	W. Liu, T. Gray, D. Fan, W. Farlow and T. Hughes, "A 250- MHz Wave Pipelined Adder in 2-pm CMOS", IEEE Journal of Solid-State Circuits, Vol.29, N~9, pp. lll7- 1127. Sept. 1994.
	Now94	K. Nowka y M. Flynn, "Wave Pipelining of High Performance CMOS Static RAM", Tech.Rep. n~ CLS-TR- 94-615. Stanford U. January 1994.
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	Xil94	"The Tilde De-Mystified", "The Programmable Logic Array Data Book", Second Edition, pp. 9-3. Xilinx Inc. 1994.