Universal logic modules for series-parallel functions

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Universal logic modules for series-parallel functions

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International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays table of contents

Monterey, California, United States

Pages: 31 - 37

Year of Publication: 1996

ISBN:0-89791-773-1

Authors

Shashidhar Thakur	Department of Computer Sciences, University of Texas at Austin
D. F. Wong	Department of Computer Sciences, University of Texas at Austin

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 7, Citation Count: 2

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	J. Cong and Y. Ding. An optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs. IEEE Trans. CAD/ICAS, 13(1):1-12, January 1994.
	2	R. Gopisetty and S. Lan. On exploration of multiplexor based FPGA logic modules. Manuscript, 1994.
	3	D.E. Knuth. Fundamental Algorithms. Addison-Wesley Publishing Company, second edition, 1973.
	4	Chih-chang Lin , Malgorzata Marek-Sadowska , Duane Gatlin, Universal logic gate for FPGA design, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.164-168, November 06-10, 1994, San Jose, California, United States
	5	R. Murgai, , N. Shenoy, R.K. Brayton, and A. L. Sangiovanni- Vincentelli. Improved logic synthesis algorithms for table lookup up architectures. In Proceedings of ICCAD, pages 564- 567. IEEE/ACM, 1991.
	6	R. Murgai , R. K. Brayton , A. L. Sangiovanni-Vincentelli, An improved synthesis algorithm for multiplexor-based PGA's, Proceedings of the 29th ACM/IEEE conference on Design automation, p.380-386, June 08-12, 1992, Anaheim, California, United States
	7	Y. N. Patt. Optimal and near-optimal universal logic modules with interconnected external terminals. IEEE Trans. Comp., C-22(10):903-907, October 1973.
	8	F. P. Preparata. On the design of universal Boolean functions. IEEE Trans. Comp., C-20(4):418-423, April 1971.
	9	Richard L. Rudell , Alberto Sangiovanni-Vincentelli, Logic synthesis for vlsi design, 1989
	10	Shashidhar Anil Thakur , Martin D. Wong, Logic module design and technology mapping for field-programmable gate arrays, 1996
	11	Shashidhar Thakur , D. F. Wong, On designing ULM-based FPGA logic modules, Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays, p.3-9, February 12-14, 1995, Monterey, California, United States [doi>10.1145/201310.201311]

CITED BY 2

	F. Y. Young , Chris C. N. Chu , D. F. Wong, Generation of universal series-parallel Boolean functions, Journal of the ACM (JACM), v.46 n.3, p.416-435, May 1999
	Zeljko Zilic , Zvonko G. Vranesic, Using Decision Diagrams to Design ULMs for FPGAs, IEEE Transactions on Computers, v.47 n.9, p.971-982, September 1998