Using BDDs to design ULMs for FPGAs

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Using BDDs to design ULMs for FPGAs

Full text

Pdf (216 KB)

Source

International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays table of contents

Monterey, California, United States

Pages: 24 - 30

Year of Publication: 1996

ISBN:0-89791-773-1

Authors

Zeljko Zilic	University of Toronto, Department of ECE
Zvonko G. Vranesic	University of Toronto, Department of ECE

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 7, Citation Count: 2

Additional Information:

references cited by index terms collaborative colleagues

Tools and Actions:	Request Permissions Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/228370.228374 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Atmel Corporation, "Configurable Logic Design and Application Book", Atmel, San Jose, CA, 1995.
	2	Bell Northern Research, "Design Rules for CMC 0.8-micron BiCMOS, a Version of BATMOS", Ottawa, Canada, 1993.
	3	Randal E. Bryant, Graph-based algorithms for Boolean function manipulation, IEEE Transactions on Computers, v.35 n.8, p.677-691, Aug. 1986 [doi>10.1109/TC.1986.1676819]
	4	J.N. Culliney, M. H. Young, T. Nakagava and S. Muroga, "Results of the Synthesis of Optimal Networks of AND and OR Gates for Four-Variable Switching Functions", IEEE Transactions on Computers, Vol. 27, No. 1, January 1979, pp. 76 - 85.
	5	M. Harrison, "Counting Theorems and their Applications to Classification of Switching Functions", Recent Developments in Switching Theory, edited by Amar Mukhopadhyay, Academic Press, 1971, pp. 86-121.
	6	Stanley L. Hurst , Jon C. Muzio , D. Michael Miller, Spectral Techniques in Digital Logic, Academic Press, Inc., Orlando, FL, 1985
	7	D. Jones and D. Lewis, "A Time Multiplexed FPGA Architecture for Logic Emulation", Third International Symposium on FPGAs, FPGA95, Monterey Bay, California, February 1995, pp. 121-126.
	8	Chih-chang Lin , Malgorzata Marek-Sadowska , Duane Gatlin, Universal logic gate for FPGA design, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.164-168, November 06-10, 1994, San Jose, California, United States
	9	E.M. Sentovich et al., "SIS: A System for Sequential Circuit Synthesis", Memorandum No. UCB/ERL M92/41, University of California Berkeley, May 1992.
	10	Soon Ong Seo, A High Speed FPGA Using Programmable Minitiles. M. A. Sc. Thesis, University of Toronto, 1994.
	11	Harold Stone, "Universal Logic Modules", Recent Developments in Switching Theory, edited by Amar Mukhopadhyay, Academic Press, 1971, pp. 230-254.
	12	E. Tau, D. Chen, I. Eslick, J. Brown and A. DeHon, "A First Generation DPGA Implementation", Proc. 3rd Canadian Workshop on Field Programmable Devices, FPD95, Montreal, May 1995, pp. 138-143.
	13	Shashidhar Thakur , D. F. Wong, On designing ULM-based FPGA logic modules, Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays, p.3-9, February 12-14, 1995, Monterey, California, United States [doi>10.1145/201310.201311]
	14	Chien-Chung Tsai , Malgorzata Marek-Sadowska, Boolean matching using generalized Reed-Muller forms, Proceedings of the 31st annual conference on Design automation, p.339-344, June 06-10, 1994, San Diego, California, United States [doi>10.1145/196244.196404]
	15	S. Yang and M. J. Cieselski, "Optimum and Suboptimum Algorithms for Input Encoding and Its Relationship to Logic Minimization", IEEE Transactions on Computer-Aided Design, Vol. 10, No. 1, January 1991, pp. 4 - 12.

CITED BY 2

	F. Y. Young , Chris C. N. Chu , D. F. Wong, Generation of universal series-parallel Boolean functions, Journal of the ACM (JACM), v.46 n.3, p.416-435, May 1999
	Narendra V. Shenoy , Jamil Kawa , Raul Camposano, Design automation for mask programmable fabrics, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA