| Unrolling-based optimizations for modulo scheduling |
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International Symposium on Microarchitecture
archive
Proceedings of the 28th annual international symposium on Microarchitecture
table of contents
Ann Arbor, Michigan, United States
Pages: 327 - 337
Year of Publication: 1995
ISBN:0-8186-7349-4
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Authors
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Daniel M. Lavery
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Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
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Wen-Mei W. Hwu
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Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
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IEEE Computer Society Press
Los Alamitos, CA, USA
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| Bibliometrics |
Downloads (6 Weeks): 4, Downloads (12 Months): 14, Citation Count: 10
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[doi> 10.1007/BF01205182]
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Wen-Mei W. Hwu , Scott A. Mahlke , William Y. Chen , Pohua P. Chang , Nancy J. Warter , Roger A. Bringmann , Roland G. Ouellette , Richard E. Hank , Tokuzo Kiyohara , Grant E. Haab , John G. Holm , Daniel M. Lavery, The superblock: an effective technique for VLIW and superscalar compilation, The Journal of Supercomputing, v.7 n.1-2, p.229-248, May 1993
[doi> 10.1007/BF01205185]
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Michael Schlansker , Vinod Kathail , Sadun Anik, Height reduction of control recurrences for ILP processors, Proceedings of the 27th annual international symposium on Microarchitecture, p.40-51, November 30-December 02, 1994, San Jose, California, United States
[doi> 10.1145/192724.192729]
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James C. Dehnert , Peter Y.-T. Hsu , Joseph P. Bratt, Overlapped loop support in the Cydra 5, Proceedings of the third international conference on Architectural support for programming languages and operating systems, p.26-38, April 03-06, 1989, Boston, Massachusetts, United States
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J. C. Gyllenhaal, "A machine description language for compilation," Master's thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana, IL, 1994.
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William Mangione-Smith , Santosh G. Abraham , Edward S. Davidson, Register requirements of pipelined processors, Proceedings of the 6th international conference on Supercomputing, p.260-271, July 19-24, 1992, Washington, D. C., United States
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B. R. Rau , M. Lee , P. P. Tirumalai , M. S. Schlansker, Register allocation for software pipelined loops, Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation, p.283-299, June 15-19, 1992, San Francisco, California, United States
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CITED BY 10
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David López , Mateo Valero , Josep Llosa , Eduard Ayguadé, Increasing memory bandwidth with wide buses: compiler, hardware and performance trade-offs, Proceedings of the 11th international conference on Supercomputing, p.12-19, July 07-11, 1997, Vienna, Austria
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