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Unrolling-based optimizations for modulo scheduling
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Source International Symposium on Microarchitecture archive
Proceedings of the 28th annual international symposium on Microarchitecture table of contents
Ann Arbor, Michigan, United States
Pages: 327 - 337  
Year of Publication: 1995
ISBN:0-8186-7349-4
Authors
Daniel M. Lavery  Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
Wen-Mei W. Hwu  Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
Sponsors
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
IEEE-CS\TCMM : TC on Microprocessors & Microcomputers
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 4,   Downloads (12 Months): 14,   Citation Count: 10
Additional Information:

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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J. A. Fisher, "Trace scheduling: A technique for global microcode compaction," IEEE Transactions on Computers, vol. c-30, pp. 478-490, July 1981.
 
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K. O'Brien, B. Hay, J. Minish, H. Schaffer, B. Schloss, A. Shepherd, and M. Zaleski, "Advanced compiler technology for the RISC System/6000 architecture," in IBM RiSC System/6000 Technology, 1990.
 
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J. C. Gyllenhaal, "A machine description language for compilation," Master's thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana, IL, 1994.
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CITED BY  10

Collaborative Colleagues:
Daniel M. Lavery: colleagues
Wen-Mei W. Hwu: colleagues