Disjoint eager execution

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Disjoint eager execution: an optimal form of speculative execution

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International Symposium on Microarchitecture archive
Proceedings of the 28th annual international symposium on Microarchitecture table of contents

Ann Arbor, Michigan, United States

Pages: 313 - 325

Year of Publication: 1995

ISBN:0-8186-7349-4

Authors

Augustus K. Uht	Department of Electrical and Computer Engineering, University of Rhode Island, Kingston, RI
Vijay Sindagi	Department of Electrical and Computer Engineering, University of Rhode Island, Kingston, RI
Kelley Hall	University of Rhode Island, Kingston, RI

Sponsors

SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
IEEE-CS\TCMM : TC on Microprocessors & Microcomputers

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 0, Downloads (12 Months): 10, Citation Count: 22

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	4	B. Ramakrishna Rau, Dynamically scheduled VLIW processors, Proceedings of the 26th annual international symposium on Microarchitecture, p.80-92, December 01-03, 1993, Austin, Texas, United States
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	7	S. Somanathan. Performance Enhancement of a Concurrent Processor. Master's thesis, University of Rhode island, May 1995.
	8	Augustus K. Uht, A Theory of Reduced and Minimal Procedural Dependencies, IEEE Transactions on Computers, v.40 n.6, p.681-692, June 1991 [doi>10.1109/12.90247]
	9	Augustus K. Uht, Concurrency Extraction Via Hardware Methods Executing the Static Instruction Stream, IEEE Transactions on Computers, v.41 n.7, p.826-841, July 1992 [doi>10.1109/12.256451]
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	14	Shlomo Weiss , James E. Smith, IBM Power and PowerPC, Morgan Kaufmann Publishers Inc., San Francisco, CA, 1994
	15	Tse-Yu Yeh , Yale N. Patt, A comparison of dynamic branch predictors that use two levels of branch history, Proceedings of the 20th annual international symposium on Computer architecture, p.257-266, May 16-19, 1993, San Diego, California, United States

CITED BY 22

	Robert S. Chappell , Jared Stark , Sangwook P. Kim , Steven K. Reinhardt , Yale N. Patt, Simultaneous subordinate microthreading (SSMT), ACM SIGARCH Computer Architecture News, v.27 n.2, p.186-195, May 1999
	Artur Klauser , Dirk Grunwald, Instruction fetch mechanisms for multipath execution processors, Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture, p.38-47, November 16-18, 1999, Haifa, Israel
	Pritpal S. Ahuja , Kevin Skadron , Margaret Martonosi , Douglas W. Clark, Multipath execution: opportunities and limits, Proceedings of the 12th international conference on Supercomputing, p.101-108, July 1998, Melbourne, Australia
	Juan L. Aragón , José González , Antonio González , James E. Smith, Dual path instruction processing, Proceedings of the 16th international conference on Supercomputing, June 22-26, 2002, New York, New York, USA
	Rakefet Kol , Ran Ginosar, Kin: a high performance asynchronous processor architecture, Proceedings of the 12th international conference on Supercomputing, p.433-440, July 1998, Melbourne, Australia
	Eric Rotenberg , Jim Smith, Control independence in trace processors, Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture, p.4-15, November 16-18, 1999, Haifa, Israel
	Artur Klauser , Abhijit Paithankar , Dirk Grunwald, Selective eager execution on the PolyPath architecture, ACM SIGARCH Computer Architecture News, v.26 n.3, p.250-259, June 1998
	Yuan Chou , Jason Fung , John Paul Shen, Reducing branch misprediction penalties via dynamic control independence detection, Proceedings of the 13th international conference on Supercomputing, p.109-118, June 20-25, 1999, Rhodes, Greece
	Pedro Marcuello , Antonio González, Clustered speculative multithreaded processors, Proceedings of the 13th international conference on Supercomputing, p.365-372, June 20-25, 1999, Rhodes, Greece
	Steven Wallace , Brad Calder , Dean M. Tullsen, Threaded multiple path execution, ACM SIGARCH Computer Architecture News, v.26 n.3, p.238-249, June 1998
	Erik Jacobsen , Eric Rotenberg , J. E. Smith, Assigning confidence to conditional branch predictions, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.142-152, December 02-04, 1996, Paris, France
	Kevin Skadron , Pritpal S. Ahuja , Margaret Martonosi , Douglas W. Clark, Improving prediction for procedure returns with return-address-stack repair mechanisms, Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture, p.259-271, November 1998, Dallas, Texas, United States
	D. Morano , A. Khalafi , D. R. Kaeli , A. K. Uht, Realizing high IPC through a scalable memory-latency tolerant multipath microarchitecture, ACM SIGARCH Computer Architecture News, v.31 n.1, March 2003
	Dirk Grunwald , Artur Klauser , Srilatha Manne , Andrew Pleszkun, Confidence estimation for speculation control, ACM SIGARCH Computer Architecture News, v.26 n.3, p.122-131, June 1998
	Matthew C. Chidester , Alan D. George , Matthew A. Radlinski, Multiple-path execution for chip multiprocessors, Journal of Systems Architecture: the EUROMICRO Journal, v.49 n.1-2, p.33-52, July 2003
	Prabhakar Raghavan , Hadas Shachnai , Mira Yaniv, Dynamic schemes for speculative execution of code, Performance Evaluation, v.53 n.2, p.125-142, July 2003
	Augustus K. Uht, Disjoint Eager Execution: what it is / what it is not, ACM SIGARCH Computer Architecture News, v.30 n.1, March 2002
	Anasua Bhowmik , Manoj Franklin, A General Compiler Framework for Speculative Multithreaded Processors, IEEE Transactions on Parallel and Distributed Systems, v.15 n.8, p.713-724, August 2004
	Augustus K. Uht , Vijay Sindagi , Sajee Somanathan, Branch Effect Reduction Techniques, Computer, v.30 n.5, p.71-81, May 1997
	Augustus K. Uht , Vijay Sindagi , Sajee Somanathan, Branch Effect Reduction Techniques, Computer, v.30 n.5, p.71-81, May 1997
	Andrew D. Hilton , Amir Roth, Ginger: control independence using tag rewriting, ACM SIGARCH Computer Architecture News, v.35 n.2, May 2007
	Parth Malani , Prakash Mukre , Qinru Qiu , Qing Wu, Adaptive scheduling and voltage scaling for multiprocessor real-time applications with non-deterministic workload, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany