| An investigation of the performance of various instruction-issue buffer topologies |
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International Symposium on Microarchitecture
archive
Proceedings of the 28th annual international symposium on Microarchitecture
table of contents
Ann Arbor, Michigan, United States
Pages: 279 - 284
Year of Publication: 1995
ISBN:0-8186-7349-4
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Authors
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Stéphan Jourdan
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Institut de Recherche en Informatique de Toulouse, Université Toulouse III, 118 route de Narbonne, 31062 Toulouse, France
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Pascal Sainrat
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Institut de Recherche en Informatique de Toulouse, Université Toulouse III, 118 route de Narbonne, 31062 Toulouse, France
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Daniel Litaize
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Institut de Recherche en Informatique de Toulouse, Université Toulouse III, 118 route de Narbonne, 31062 Toulouse, France
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IEEE Computer Society Press
Los Alamitos, CA, USA
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| Bibliometrics |
Downloads (6 Weeks): 1, Downloads (12 Months): 3, Citation Count: 1
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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L. Gwennap, "Intel's P6 Uses Decoupled Superscalar Design," Microprocessor Report, Vol. 9 Num. 2, 1995.
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4
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L. Gwennap, "Pa-8000 Combines Complexity and Speed," Microprocessor Report, Vol. 8 Num. 15, 1994.
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5
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6
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IBM and Motorola, "PowerPC 604 RISC Microprocessor Technical Summary," Advance information, MPR604TSU-1, 1994.
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7
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IBM and Motorola, "PowerPC 620 RISC Microprocessor Technical Summary," Advance Information, MPR620TSU-1, 1994.
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8
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M. johnson, Superscalar M~croprocessor Design, Prentice-Hall, 1991.
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9
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10
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Mips technologies Incorporated, "gl0000 Microprocessor Product Overview," Technical Report, October 1994.
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11
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M. Simone , A. Essen , A. Ike , A. Krishnamoorthy , T. Maruyama , N. Patkar , M. Ramaswami , M. Shebanow , V. Thirumalaiswamy , D. Tovey, Implementation trade-offs in using a restricted data flow architecture in a high performance RISC microprocessor, Proceedings of the 22nd annual international symposium on Computer architecture, p.151-162, June 22-24, 1995, S. Margherita Ligure, Italy
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12
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13
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M.D. Smith, "Tracing with Pixie," Technical report, Stanford Uniwr~ity, April 1901_
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14
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"SPEC 92", Technical report, December 1992.
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15
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J.E. Thornton, Design of a Computer: The Control Data 5500, Glenview, Foresman, 1970.
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16
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