Critical path reduction for scalar programs

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Critical path reduction for scalar programs

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International Symposium on Microarchitecture archive
Proceedings of the 28th annual international symposium on Microarchitecture table of contents

Ann Arbor, Michigan, United States

Pages: 57 - 69

Year of Publication: 1995

ISBN:0-8186-7349-4

Authors

Michael Schlansker	Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, CA
Vinod Kathail	Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, CA

Sponsors

SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
IEEE-CS\TCMM : TC on Microprocessors & Microcomputers

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 11, Citation Count: 13

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Michael S. Schlansker , Vinod Kathail, Acceleration of First and Higher Order Recurrences on Processors with Instruction Level Parallelism, Proceedings of the 6th International Workshop on Languages and Compilers for Parallel Computing, p.406-429, August 12-14, 1993
	2	Michael Schlansker , Vinod Kathail , Sadun Anik, Height reduction of control recurrences for ILP processors, Proceedings of the 27th annual international symposium on Microarchitecture, p.40-51, November 30-December 02, 1994, San Jose, California, United States [doi>10.1145/192724.192729]
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	5	Wen-Mei W. Hwu , Scott A. Mahlke , William Y. Chen , Pohua P. Chang , Nancy J. Warter , Roger A. Bringmann , Roland G. Ouellette , Richard E. Hank , Tokuzo Kiyohara , Grant E. Haab , John G. Holm , Daniel M. Lavery, The superblock: an effective technique for VLIW and superscalar compilation, The Journal of Supercomputing, v.7 n.1-2, p.229-248, May 1993 [doi>10.1007/BF01205185]
	6	V. Kathail, M. S. Schlansker, and B. R. Rau. H PL PlayDoh architecture specification: Version 1.0. Technical Report HPL-93-80,Hewlett-Packard Laboratories, Palo Alto CA, 1993.
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	26	M. Schlansker and V. Kathail. Techniques for Critical Path Reduction of Scalar Programs. Technical Report HPL-95-112, Hewlett-Packard Laboratories, Palo Alto CA, 1995.

CITED BY 13

	Lori Carter , Beth Simon , Brad Calder , Larry Carter , Jeanne Ferrante, Path Analysis and Renaming for Predicated Instruction Scheduling, International Journal of Parallel Programming, v.28 n.6, p.563-588, December 2000
	David I. August , John W. Sias , Jean-Michel Puiatti , Scott A. Mahlke , Daniel A. Connors , Kevin M. Crozier , Wen-mei W. Hwu, The program decision logic approach to predicated execution, ACM SIGARCH Computer Architecture News, v.27 n.2, p.208-219, May 1999
	Richard Johnson , Michael Schlansker, Analysis techniques for predicated code, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.100-113, December 02-04, 1996, Paris, France
	Alexandre E. Eichenberger , Waleed M. Meleis, Balance scheduling: weighting branch tradeoffs in superblocks, Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture, p.272-283, November 16-18, 1999, Haifa, Israel
	Rastislav Bodík , Rajiv Gupta, Partial dead code elimination using slicing transformations, ACM SIGPLAN Notices, v.32 n.5, p.159-170, May 1997
	Waleed M. Meleis , Alexandre E. Eichenberger , Ivan D. Baev, Scheduling Superblocks with Bound-Based Branch Trade-Offs, IEEE Transactions on Computers, v.50 n.8, p.784-797, August 2001
	Rajiv Gupta , David A. Berson , Jesse Z. Fang, Resource-sensitive profile-directed data flow analysis for code optimization, Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, p.358-368, December 01-03, 1997, Research Triangle Park, North Carolina, United States
	Michael Schlansker , Scott Mahlke , Richard Johnson, Control CPR: a branch height reduction optimization for EPIC architectures, ACM SIGPLAN Notices, v.34 n.5, p.155-168, May 1999
	David M. Gillies , Dz-ching Roy Ju , Richard Johnson , Michael Schlansker, Global predicate analysis and its application to register allocation, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.114-125, December 02-04, 1996, Paris, France
	Brian L. Deitrich , Wen-mei W. Hwu, Speculative hedge: regulating compile-time speculation against profile variations, Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture, p.70-79, December 02-04, 1996, Paris, France
	Michael Schlansker , Thomas M. Conte , James Dehnert , Kemal Ebcioglu , Jesse Z. Fang , Carol L. Thompson, Compilers for Instruction-Level Parallelism, Computer, v.30 n.12, p.63-69, December 1997
	William C. Kreahling , David Whalley , Mark W. Bailey , Xin Yuan , Gang-Ryung Uh , Robert van Engelen, Branch elimination by condition merging, Software—Practice & Experience, v.35 n.1, p.51-74, January 2005
	Cheng Wang , Youfeng Wu , Edson Borin , Shiliang Hu , Wei Liu , Dave Sager , Tin-fook Ngai , Jesse Fang, Dynamic parallelization of single-threaded binary programs using speculative slicing, Proceedings of the 23rd international conference on Supercomputing, June 08-12, 2009, Yorktown Heights, NY, USA