| Impulse response fault model and fault extraction for functional level analog circuit diagnosis |
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International Conference on Computer Aided Design
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Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
table of contents
San Jose, California, United States
Pages: 631 - 636
Year of Publication: 1995
ISBN:0-8186-7213-7
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Authors
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Chauchin Su
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Department of Electrical Engineering, National Central University, Chung-Li, Taiwan 32054, R.O.C.
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Shenshung Chiang
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Department of Electrical Engineering, National Central University, Chung-Li, Taiwan 32054, R.O.C.
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Shyh-Jye Jou
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Department of Electrical Engineering, National Central University, Chung-Li, Taiwan 32054, R.O.C.
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IEEE Computer Society
Washington, DC, USA
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| Bibliometrics |
Downloads (6 Weeks): 2, Downloads (12 Months): 5, Citation Count: 3
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ABSTRACT
In this paper, a functional fault model for analog circuit diagnosis is proposed. A faulty module is modeled as a fault-free module in serial or in parallel with a fault module. To extract such a fault module, we adopt an iterative deconvolution technique to deconvolute the impulse response of the fault module from the faulty response. The test results show that with such a fault model and fault extraction technique the diagnostic resolution is improved significantly due to the separation of the fault and the system function. Moreover, such a fault model allows single-module fault tables to be applied to the diagnosis of a multi-module system.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 3
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Chauchin Su , Yue-Tsang Chen , Shyh-Jye Jou , Yuan-Tzu Ting, Metrology for analog module testing using analog testability bus, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.594-599, November 10-14, 1996, San Jose, California, United States
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