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Impulse response fault model and fault extraction for functional level analog circuit diagnosis
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Source International Conference on Computer Aided Design archive
Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California, United States
Pages: 631 - 636  
Year of Publication: 1995
ISBN:0-8186-7213-7
Authors
Chauchin Su  Department of Electrical Engineering, National Central University, Chung-Li, Taiwan 32054, R.O.C.
Shenshung Chiang  Department of Electrical Engineering, National Central University, Chung-Li, Taiwan 32054, R.O.C.
Shyh-Jye Jou  Department of Electrical Engineering, National Central University, Chung-Li, Taiwan 32054, R.O.C.
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
Publisher
IEEE Computer Society  Washington, DC, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 5,   Citation Count: 3
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ABSTRACT

In this paper, a functional fault model for analog circuit diagnosis is proposed. A faulty module is modeled as a fault-free module in serial or in parallel with a fault module. To extract such a fault module, we adopt an iterative deconvolution technique to deconvolute the impulse response of the fault module from the faulty response. The test results show that with such a fault model and fault extraction technique the diagnostic resolution is improved significantly due to the separation of the fault and the system function. Moreover, such a fault model allows single-module fault tables to be applied to the diagnosis of a multi-module system.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
W. Bandler and A.E. Salama, "Fault Diagnosis of Analog Circuit" IEEE Proceedings, Vol 73 pp. 1279-1325, August 1985.
 
2
Chen, "Experiment on Fault Location in Large- Scale Analog Circuit," IEEE Tran. Instrumentalion and Measurement, Vol. 42, pp.30-34, Feb. 1993.
 
3
Dai and T.M. Souders, "Time-Domain Testing Strategies and Fault Diagnosis for Analog Systems," IEEE Trans. Instrumentation and Measurement, Vol 39, pp.157-162, Feb. 1990.
 
4
R. Epstein, et al., "Fault Detection and Classification in Linear Integrated Circuits: An Application of Discrimination Analysis and Hypothesis Testing," IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, Vol 12 pp. 102- 113, Jan. 1993.
 
5
Liberatore, et al., "Network Symbolic Analysis for Automated Fault Diagnosis," Proc. IEEE Int'l Syrup. on Circuits and Systems, pp. 1169-1172, 1992.
 
6
Odryna and A.J. Strojwas, "PROD: A VLSI Fault Diagnosis System," IEEE Design and Test of Computers, pp.27-35, Dec. 1985.
 
7
A. A1-Qutayri ad P.R. Shepherd, "Go/No-Go Testing of Analogue Macros," IF, F, Proc.-G, Vol 139, pp.534-540, Aug. 1992.
 
8
Koskinen and P.Y.K. Cheung, "Statistical and Behavioral Modeling of Analogue Integrated Circuits," IF, F, Proc.-G, Vol 140 pp.171-176, June 1993.
 
9
E. Salama and F.Z. Amer, "Parameter Identification Approach to Fault Diagnosis of Switched Capacitor Circuits," IF, F, Proc.-G Vol 139 pp. 467- 472, August, 1992.
 
10
G. Childers, et. al., "The Cepstrum: A Guide to Processing," IEEE Proceeding, pp.1428-1443, Oct. 1977.
 
11
V. Oppenheim and R.W. Schafer, Digital Signal Processing, Prentice-Hall, Inc, New Jersey, U.S.A., 1975.
 
12
B. Bendar and T.L. Watt, "Calculating the Complex Cepstrum Without Phase Unwrapping or Integration," IEEE Trans. Acoustics, Speech, and Signal Processing, pp.1014-1017, Aug. 1985.
 
13
M. Tribolet, "A New Phase Unwrapping Algorithm," IEEE Trans. Acoustics, Speech, and Signal Processing, pp.170-177, Apr. 1977.
 
14
Bennia and S.M. Riad, "An Optimization Technique for Iterative Frequency-Domain Deconvolution," IEEE Trans. Instrumentation and Measurement, pp.358-362, Apr. 1990.
 
15
K. Simpson, "Fuzzy Min-Max Neural Networks - Part 1: Classification," IEEE Trans. Neural Networks, pp.776-787, Sept. 1992.
 
16
T. Tou and R.C. Gonzalez, Pattern Recognition Principles, Addison-Wesley, 1977.


Collaborative Colleagues:
Chauchin Su: colleagues
Shenshung Chiang: colleagues
Shyh-Jye Jou: colleagues