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Bounded-skew clock and Steiner routing under Elmore delay
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Source International Conference on Computer Aided Design archive
Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California, United States
Pages: 66 - 71  
Year of Publication: 1995
ISBN:0-8186-7213-7
Authors
Jason Cong  UCLA, Dept. of Computer Science, Los Angeles, CA
Andrew B. Kahng  UCLA, Dept. of Computer Science, Los Angeles, CA
Cheng-Kok Koh  UCLA, Dept. of Computer Science, Los Angeles, CA
C.-W. Albert Tsao  UCLA, Dept. of Computer Science, Los Angeles, CA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
Publisher
IEEE Computer Society  Washington, DC, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 21,   Citation Count: 15
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ABSTRACT

We study the minimum-cost bounded-skew routing tree problem under the Elmore delay model. We present two approaches to construct bounded-skew routing trees: (i) the Boundary Merging and Embedding (BME) method which utilizes merging points that are restricted to the boundaries of merging regions, and (ii) the Interior Merging and Embedding (IME) algorithm which employs a sampling strategy and dynamic programming to consider merging points that are interior to, rather than on the boundary of, the merging regions. Our new algorithms allow accurate control of Elmore delay skew, and show the utility of merging points inside merging regions.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
K. D. Boese and A. B. Kahng, "Zero-Skew Clock Routing Trees With Minimum Wirelength", P1vc. IEEE 5th Intl. ASIC Conf., Rochester, September 1992, pp. 1.1.1 - 1.1.5.
 
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K. D. Boese, A. B. Kahng, B. A. McCoy and G. Robins, "Near-Optimal Critical Sink Routing Tree Constructions," to appear in IEEE Trans. on CAD, 1995.
 
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M. Borah, R. M. Owens and M. J. Irwin, "An Edge-Based Heuristic for Rectilinear Steiner Trees", IEEE Trans. on CAD, to appear, Dec. 1994, pp. 1563-1568.
 
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T.-H. Chao, Y.-C. Hsu, J. M. Ho, K. D. Boese and A. B. Kahng, "Zero Skew Clock Routing With Minimum Wirelength," IEEE Trans. on Cilvuits and Systems 39(11), Nov. 1992, pp. 799-814.
 
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J. Cong, A. B. Kahng, C.-K. Koh and C.-W. A. Tsao, "Bounded-Skew Clock and Steiner Routing Under Elmore Delay," UCLA Computer Science Department Technical Report 950030, Aug. 1995.
 
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J. Cong and C.-K. Koh, "Minimum-Cost Bounded-Skew Clock Routing," P1vc. IEEE Intl. Syrup. on Ci~vuits and Systems, Vol 1, Apr. 1995, pp. 215-218.
 
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J. Cong and K.-S. Leung, "Optimal Wiresizing Under Elmore Delay Model," IEEE Trans. on Computer-AidedDesign, Mar. 1995, pp. 321-336.
 
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M. Edahiro, "Minimum Path-Length Equi-Distant Routing," P~vc. IEEE Asia- Pacific Conf. on Cilvuits and Systems, Dec. 1992, pp. 41-46.
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A. B. Kahng and G. Robins, "A New Class of Iterative Steiner Tree Heuristics with Good Performance", IEEE Transactions on Computer-Aided Design, 11(7), Jul. 1992, pp. 893-902.
 
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A. B. Kahng and G. Robins, On Optimal Intelvonnectionsfor VLSI, Kluwer Academic Publishers, 1994.
 
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R.S. Tsay, "An Exact Zero-Skew Clock Routing Algorithm,"IEEE Transactions on Computer-Aided Design, 12(2), Feb. 1993, pp. 242-249.
 
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CITED BY  15

Collaborative Colleagues:
Jason Cong: colleagues
Andrew B. Kahng: colleagues
Cheng-Kok Koh: colleagues
C.-W. Albert Tsao: colleagues