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A framework for the analysis and design of algorithms for a class of VLSI-CAD optimization problems
Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 1995 Asia and South Pacific Design Automation Conference table of contents
Makuhari, Massa, Chiba, Japan
Article No. 12  
Year of Publication: 1995
ISBN:0-89791-766-9
Authors
C.-J. Shi
J. A. Brzozowski
Sponsors
IEEE-CAS : Circuits & Systems
IFIP WG 10.2 : IFIP WG 10.2
ISPJ : ISPJ
SIGDA: ACM Special Interest Group on Design Automation
IEICE : Inst of Electronics, Info & Communication Engineers
IFIP WG 10.5 : IFIP WG 10.5
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): n/a,   Downloads (12 Months): n/a,   Citation Count: 1
Additional Information:

cited by   index terms   collaborative colleagues  

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DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/224818.224843
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CITED BY
C.-J. Shi , J. A. Brzozowski, Cluster-cover: a theoretical framework for a class of VLSI-CAD optimization problems, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.3 n.1, p.76-107, Jan. 1998

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.3 Design Aids
          Subjects: Optimization

  J. Computer Applications
  J.6 COMPUTER-AIDED ENGINEERING
      Subjects: Computer-aided design (CAD)


General Terms:
Algorithms, Design, Performance

Collaborative Colleagues:
C.-J. Shi: colleagues
J. A. Brzozowski: colleagues

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