| Synthesis of system-level communication by an allocation-based approach |
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International Symposium on Systems Synthesis
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Proceedings of the 8th international symposium on System synthesis
table of contents
Cannes, France
Pages: 150 - 155
Year of Publication: 1995
ISBN:0-89791-771-5
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Downloads (6 Weeks): 1, Downloads (12 Months): 10, Citation Count: 25
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ABSTRACT
Abstract: Communication synthesis aims to transform a system with processes that communicate via high level primitives through channels into interconnected processes that communicate via signals and share communication control. We present a new algorithm that performs binding/allocation of communication units. This algorithm makes use of a cost function to evaluate different allocation alternatives. The proposed communication synthesis approach deals with both protocol selection and interface synthesis and is based on binding/allocation of communication units. We illustrate through an example the usefulness of the algorithm for allocating automatically different protocols within the same system.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Jörg Henkel , Rolf Ernst , Ullrich Holtmann , Thomas Benner, Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.96-100, November 06-10, 1994, San Jose, California, United States
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A.A. Jerraya, and K. O'Brien, "Solar: An Intermediate Format for System-Level Modeling and Synthesis", in "Computer Aided Software/Hardware Engineering", J.Rozenblit, K.Buchenrieder (eds), IEEE Press, Piscataway, N.J., pp 147-175, 1994.
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K. Salah, and R. Probert, "A Service-Based Method for the Synthesis of Communication Protocols", Int'l Journal of Mini and Microcomputers, Vol. 12, No. 3, pp. 97-103, 1990.
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W. Wolf, "Hardware/Software Co-Design of Embedded Systems", Proc. IEEE, Vol 82, No 7, pp 967-989, 1994.
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CITED BY 25
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Kanishka Lahiri , Anand Raghunathan , Sujit Dey, Fast performance analysis of bus-based system-on-chip communication architectures, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.566-573, November 07-11, 1999, San Jose, California, United States
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L. Freund , M. Israel , F. Rousseau , J. M. Bergé , M. Auguin , C. Belleudy , G. Gogniat, A codesign experiment in acoustic echo cancellation: GMDF&agr;, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.2 n.4, p.365-383, Oct. 1997
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Faraydon Karim , Anh Nguyen , Sujit Dey , Ramesh Rao, On-chip communication architecture for OC-768 network processors, Proceedings of the 38th conference on Design automation, p.678-683, June 2001, Las Vegas, Nevada, United States
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Kanishka Lahiri , Anand Raghunathan , Ganesh Lakshminarayana , Sujit Dey, Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips, Proceedings of the 37th conference on Design automation, p.513-518, June 05-09, 2000, Los Angeles, California, United States
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Paul Pop , Petru Eles , Zebo Peng, Bus access optimization for distributed embedded systems based on schedulability analysis, Proceedings of the conference on Design, automation and test in Europe, p.567-575, March 27-30, 2000, Paris, France
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Srinivasan Murali , Paolo Meloni , Federico Angiolini , David Atienza , Salvatore Carta , Luca Benini , Giovanni De Micheli , Luigi Raffo, Designing application-specific networks on chips with floorplan information, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, November 05-09, 2006, San Jose, California
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M. Abid , T. Ben Ismail , A. Changuel , C. A. Valderrama , M. Romdhani , G. F. Marchioro , J. M. Daveau , A. A. Jerraya, Hardware/Software Co-Design Methodology for Design of Embedded Systems, Integrated Computer-Aided Engineering, v.5 n.1, p.69-84, January 1998
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INDEX TERMS
Primary Classification:
C.
Computer Systems Organization
C.0
GENERAL
Subjects:
Systems specification methodology
Additional Classification:
C.
Computer Systems Organization
C.0
GENERAL
Subjects:
Hardware/software interfaces
G.
Mathematics of Computing
G.2
DISCRETE MATHEMATICS
G.2.2
Graph Theory
Subjects:
Trees
General Terms:
Algorithms,
Design
Keywords:
allocation-based approach,
communication control,
cost function,
high level primitives,
high level synthesis,
interconnected processes,
interface synthesis,
protocol selection,
protocols,
system-level communication synthesis,
systems analysis
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