On the use of VHDL-based behavioral synthesis for telecom ASIC design

ABSTRACT

Abstract: VHDL-based behavioral synthesis is appearing on the market but it still has to prove that it can have a significant impact. In the past, most applications for behavioral synthesis came from the DSP area and from the academic world. In contrast, this paper describes the results of an investigation and evaluation of several behavioral synthesis tools, carried out on recent designs of Alcatel-Bell, leading to a more detailed study of relevant industrial telecom non-DSP circuits, that were suitable for behavioral synthesis. From our expertise in telecom system hardware design, we can conclude that, taking into account that today world-wide about 6,000 licenses for logic synthesis are in use, there is distinctly a market potential for design-entries at higher levels of abstraction, due to the still increasing design complexities that can be expected in the near future. Behavioral synthesis can play a key role in this prospect, as stand-alone hardware CAD tool, or integrated in a global system design flow strategy for HW/SW-codesign. However, we experienced that efficient use of behavioral synthesis tools for telecom non-DSP circuits requires functionality that goes beyond simply generating an RTL-synthesizable description. This functionality is discussed, together with a system level design methodology for efficient use of behavioral synthesis tools.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles

          Nouns: ASIC

Additional Classification:
  B. Hardware
  B.4 INPUT/OUTPUT AND DATA COMMUNICATIONS
  B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION
  B.6 LOGIC DESIGN
      B.6.3 Design Aids

          Nouns: VHDL

General Terms:
Design, Languages, Performance

Keywords:
Alcatel-Bell, RTL-synthesizable description, VHDL, application specific integrated circuits, behavioral synthesis, behavioral synthesis tools, design complexities, hardware CAD tool, hardware description languages, hardware software codesign, high level synthesis, integrated circuit design, integrated logic circuits, logic synthesis, system level design methodology, telecom ASIC design, telecom system hardware design, telecommunication computing