Fault modeling of differential ECL

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Fault modeling of differential ECL

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European Design Automation Conference archive
Proceedings of the conference on European design automation table of contents

Brighton, England

Pages: 190 - 195

Year of Publication: 1995

ISBN:0-8186-7156-4

Authors

Udo Jorczyk	SICAN-Forschungs- und Entwicklungsbetriebsgesellschaft, SIBET GmbH
Wilfried Daehn	SICAN-Forschungs- und Entwicklungsbetriebsgesellschaft, SIBET GmbH
Oliver Neumann	SICAN-Forschungs- und Entwicklungsbetriebsgesellschaft, SIBET GmbH

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

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Downloads (6 Weeks): 2, Downloads (12 Months): 7, Citation Count: 1

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	2	M. Auer, "Stand und Tendenzen bei Hochgeschwindigkeitsschaltkreisen und ihre Auswirkung auf die Gestaltung elektronischer Ger~ite und Baugruppen", Wiss. Z. Techn. Universit~it Dresden, 1990, S. 6-8
	3	J.A. Abraham, W.F. Fuchs, "Fault and Error Models for VLSr', Proceedings of the IEEE, 1986, vol. 74, pp. 639- 653
	4	D. A1-Khalili, M.O. Esonu, C. Rozon, "Emitter Coupled Logic Testability Analysis and Comparison with CMOS & BiCMOS Circuits", ETC 93, pp. 263-272
	5	J.P. Hayes, "Fault Modeling", IEEE Design & Test, 1985, pp. 88-95
	6	D. Al-Khalili , C. Rozon , B. Stewart, Testability analysis and fault modeling of BiCMOS circuits, Journal of Electronic Testing: Theory and Applications, v.3 n.3, p.207-217, Aug. 1992 [doi>10.1007/BF00134731]
	7	M.E. Levitt, K. Roy, J.A. Abraham, " B iCMOS Fault Models: Is Stuck-At Adequate?", IEEE Test & Design, 1990, pp. 294-297
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	9	C.C. Beh, K.H. Arya, C.E. Radke, K.E. Torku, "Do Stuck Fault Models Reflect Manufactoring Defects?", IEEE Test Conference, 1982, pp. 35-42
	10	Timoc, M. Btihler, T. Griswold, F. Stott, L. Hess, " Logical Models of Physical Failures ", IEEE Design & Test, 1983, paper 19.1, pp. 546-553
	11	S.M. Menon, A.P. Jayasumana, Y.K. Malaiya, "Fault Modelling of ECL Devices", Electronic Letters, 1990, vol. 26, No. 15, pp. 1105-1107
	12	H.-M. Rein, R. Ranfft, "High Speed Bipolar Logic Circuits with Low Power Consumption for LSI - A Comparison", IEEE Journal of Solid-State Circuits, 1982, Vol. SC-17, pp. 703-712
	13	H.-M. Rein, R. Ranfft, Integrierte Bipolarschaltungen, Springer Verlag, 13. Auflage, 1987
	14	D.A. Hodges, H.G. Jackson, Analysis and Design of digital integrated Circuits, McGraw-Hill Book Company, second edition, 1988