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Logic design for low-voltage/low-power CMOS circuits
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Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 1995 international symposium on Low power design table of contents
Dana Point, California, United States
Pages: 117 - 122  
Year of Publication: 1995
ISBN:0-89791-744-8
Authors
C. Piguet  CSEM Centre Suisse d'Electronique et de Microtechnique SA, Maladère 71, 2000 Neuchätel, Switzerland
J.-M. Masgonty  CSEM Centre Suisse d'Electronique et de Microtechnique SA, Maladère 71, 2000 Neuchätel, Switzerland
V. von Kaenel  CSEM Centre Suisse d'Electronique et de Microtechnique SA, Maladère 71, 2000 Neuchätel, Switzerland
T. Schneider  CSEM Centre Suisse d'Electronique et de Microtechnique SA, Maladère 71, 2000 Neuchätel, Switzerland
Sponsors
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 30,   Citation Count: 0
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
V. von Kernal et al. "Automatic Adjusment of Threshold Supply Voltage Minimum Power Consumption in CMOS Digital Circuits", 1994 IEEE Symposium on Low Power Electronics, San Diego, October 10-12, 1994, pp. 78-79.
 
2
D. Liu, C. Svenssoo, Trading Speoul for Low Power by Choice of Supply and Threshold Voltages". IEEE JSSC-28, No. 1, Jan 1993, pp. 10.
 
3
C. Piguet et al. "Low-Power Low-Voltage Digital CMOS Cell Design", Proc. PATMOS' 94 Oct. 17-19, 1998 Barcelons, spain, pp. 132-139.
 
4
A. P. Chandrakasan, S. Sbeng, R. W. Srodersen. "Low-Power CMOS Digital Design" IEEE ISSS. Vol. 27, No. 4, April 1992, pp. 473-484.
 
5
R. F. Lyon, "Cost, Power, and Parallellism in Speech Signal Processing", IEEE 1993 CICC, paper 15.1.1, San Diego, CA, USA.
 
6
E. A. Vlitoz, "Low Power Design : Ways to Approach the Limits", Plenary Address ISSCC '94, February 16-18, 1994, San Francisey, USA.
 
7
J-M. Masgonty et al. "Feebology and Power supply Independent Cell Library IEEE CICC'91, May 12-15, 1991, San Diego, CA, USA, Conf. 25.5.
 
8
F. Morner, N. Azenard, M. Robert, D. Advantage, Flexible Macrocell Layout Generator", 4th ACMSIGDA Physical Design Wodeshop, Los Angeles, 1993, pp. 105-116.
 
9
C. Mend, M. Rem, "Cost and Performance of VLSI Computing Structures" IEEE ISSC-11, April 1970, pp. 455-462.
 
10
C. Piguel, "Ultra Low-Power Digital Design", Low-Power/Low-Voltage IC Design Courses, May 9, 13, 1994, Monterey, CA, USA, and April 17-21, 1995, santa Clara, CA, USA.
 
11
M. Lowy, "Low-Power Sproal Spectrum Code Generator Based on Parallel Shift Register Implementation", 1994 IEEE Symposium on Low Power Electronics, San Diego, October 10-12, 1994, pp. 22-23.
 
12
Y. Chimo, M. Suzuki, "A 250-Mb/s, 700- mW. 32-Higbway "8-b S/P Converter LST with Cross-Access Mentory", IEEE ISSSc-27, No 4, April 1992, pp. 530-38.
 
13
R. Hoselegn et al. "Low-Power Design Using Double Edge Triggered Flip-Flops", IEEE Trans. on very Large Scale lologer. Syst. Vol. 2, No 2, June 1994, pp. 261.
 
14
 
15
G. Panigrahi, "The Implementation of Electronic Social Memories", Computer, July 1977, pp. 18-25.

Collaborative Colleagues:
C. Piguet: colleagues
J.-M. Masgonty: colleagues
V. von Kaenel: colleagues
T. Schneider: colleagues