Information theoretic measures of energy consumption at register transfer level

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Information theoretic measures of energy consumption at register transfer level

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1995 international symposium on Low power design table of contents

Dana Point, California, United States

Pages: 81 - 86

Year of Publication: 1995

ISBN:0-89791-744-8

Authors

Diana Marculescu	Department of Electrical Engineering Systems, University of Southern California, Los Angeles, CA
Radu Marculescu
Massoud Pedram	Department of Electrical Engineering Systems, University of Southern California, Los Angeles, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 23, Citation Count: 19

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	16	R. Marculescu, 'A Probabilistic Approach for Power Estimation Under Pseudorandom Input Sequences', Class Project, Fall 1993, Univ. of Southern California.
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CITED BY 19

	E. Musoll , J. Cortadella, Scheduling and resource binding for low power, Proceedings of the 8th international symposium on System synthesis, p.104-109, September 13-15, 1995, Cannes, France
	Weidong Wang , Anand Raghunathan , Ganesh Lakshminarayana , Niraj K. Jha, Input space adaptive design: a high-level methodology for energy and performance optimization, Proceedings of the 38th conference on Design automation, p.738-743, June 2001, Las Vegas, Nevada, United States
	M. Nemani , F. Najm, High-level power estimation and the area complexity of Boolean functions, Proceedings of the 1996 international symposium on Low power electronics and design, p.329-334, August 12-14, 1996, Monterey, California, United States
	Farid N. Najm, Power estimation techniques for integrated circuits, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.492-499, November 05-09, 1995, San Jose, California, United States
	Mahadevamurty Nemani , Farid N. Najm, High-level area and power estimation for VLSI circuits, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.114-119, November 09-13, 1997, San Jose, California, United States
	M. Stan , W. Burleson, Two dimensional codes for low power, Proceedings of the 1996 international symposium on Low power electronics and design, p.335-340, August 12-14, 1996, Monterey, California, United States
	Zhanping Chen , Kaushik Roy, A power macromodeling technique based on power sensitivity, Proceedings of the 35th annual conference on Design automation, p.678-683, June 15-19, 1998, San Francisco, California, United States
	Paul Landman, High-level power estimation, Proceedings of the 1996 international symposium on Low power electronics and design, p.29-35, August 12-14, 1996, Monterey, California, United States
	N. Shanbhag, Lower bounds on power dissipation for DSP algorithms, Proceedings of the 1996 international symposium on Low power electronics and design, p.43-48, August 12-14, 1996, Monterey, California, United States
	Massoud Pedram, Power minimization in IC design: principles and applications, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.1 n.1, p.3-56, Jan. 1996
	Subodh Gupta , Farid N. Najm, Power macromodeling for high level power estimation, Proceedings of the 34th annual conference on Design automation, p.365-370, June 09-13, 1997, Anaheim, California, United States
	Kamal S. Khouri , Ganesh Lakshminarayana , Niraj K. Jha, Fast high-level power estimation for control-flow intensive design, Proceedings of the 1998 international symposium on Low power electronics and design, p.299-304, August 10-12, 1998, Monterey, California, United States
	Anand Raghunathan , Sujit Dey , Niraj K. Jha, Register-transfer level estimation techniques for switching activity and power consumption, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.158-165, November 10-14, 1996, San Jose, California, United States
	Anand Raghunathan , Sujit Dey , Niraj K. Jha, High-level macro-modeling and estimation techniques for switching activity and power consumption, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.4, p.538-557, August 2003
	W. Ye , N. Vijaykrishnan , M. Kandemir , M. J. Irwin, The design and use of simplepower: a cycle-accurate energy estimation tool, Proceedings of the 37th conference on Design automation, p.340-345, June 05-09, 2000, Los Angeles, California, United States
	Weidong Wang , Anand Raghunathan , Ganesh Lakshminarayana , Niraj K. Jha, Input space adaptive design: a high-level methodology for optimizing energy and performance, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.6, p.590-602, June 2004
	Joel Coburn , Srivaths Ravi , Anand Raghunathan, Power emulation: a new paradigm for power estimation, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
	Weidong Wang , Anand Raghunathan , Ganesh Lakshminarayana , Niraj K. Jha, Input Space Adaptive Embedded Software Synthesis, Proceedings of the 2002 conference on Asia South Pacific design automation/VLSI Design, p.711, January 07-11, 2002
	Joel Coburn , Srivaths Ravi , Anand Raghunathan, Hardware Accelerated Power Estimation, Proceedings of the conference on Design, Automation and Test in Europe, p.528-529, March 07-11, 2005