| An efficient, fully adaptive deadlock recovery scheme: DISHA |
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International Symposium on Computer Architecture
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Proceedings of the 22nd annual international symposium on Computer architecture
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S. Margherita Ligure, Italy
Pages: 201 - 210
Year of Publication: 1995
ISBN:0-89791-698-0
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Authors
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K. V. Anjan
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Electrical Engineering, Systems Department, University of Southern California, 3740 McClintock Avenue, EEB-208, Los Angeles, CA
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Timothy Mark Pinkston
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Electrical Engineering, Systems Department, University of Southern California, 3740 McClintock Avenue, EEB-208, Los Angeles, CA
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Downloads (6 Weeks): 14, Downloads (12 Months): 54, Citation Count: 27
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ABSTRACT
This paper presents a simple, efficient and cost effective routing strategy that considers deadlock recovery as opposed to prevention. Performance is optimized in the absence of deadlocks by allowing maximum flexibility in routing. Disha supports true fully adaptive routing where all virtual channels at each node are available to packets without regard for deadlocks. Deadlock cycles, upon forming, are efficiently broken by progressively routing one of the blocked packets through a deadlock-free lane. This lane is implemented using a central "floating" deadlock buffer resource in routers which is accessible to all neighboring routers along the path. Simulations show that the Disha scheme results in superior performance and is extremely simple, ensuring quick recovery from deadlocks and enabling the design of fast routers.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Anjan K. V., Timothy Mark Pinkston, and Jose Duato. Concurrent Deadlock Recovery in Disha. ~;ubmitted to the International Conference on Computer Design, October 1995.
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Anjan K. V. and Timothy Mark Pinkston. DISHA: An Efficient, Fully Adaptive Deadlock Recovery Scheme. CENG Technical Report 94-23, Department of Electrical Engineering - Systems, University of Southern California, Los Angeles, CA 90089-2562, November 1994.
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Andrew A. Chien. A Cost and Speed Model for k-ary ncube Wormhole Routers. In Proceedings of the symposium on Hot Interconnects, IEEE Computer Society, August 1993.
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K. Aoyama. Design Issues in Implementing an Adaptive Router. Master's Thesis, University of Illinois, Department of Computer Science, 1304 W. Springfield Avenue, Urbana, Illinois., January 1993.
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Pablo E. Berman , Luis Gravano , Gustavo D. Pifarré , Jorge L. C. Sanz, Adaptive deadlock- and livelock-free routing with all minimal paths in Torus networks, Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures, p.3-12, June 29-July 01, 1992, San Diego, California, United States
[doi> 10.1145/140901.140902]
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J. Duato. A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks. In Proceedings of the International Conference on Parallel Processing, CRC Press, pages I 142-I 149, August 1994.
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J. H. Kim , Z. Liu , A. A. Chien, Compressionless routing: a framework for adaptive and fault-tolerant routing, Proceedings of the 21ST annual international symposium on Computer architecture, p.289-300, April 18-21, 1994, Chicago, Illinois, United States
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Timothy Mark Pinkston. Design Considerations for Optical Interconnects in Parallel Computers. In Proceedings of the First International Workshop on Massively Parallel Processing using Optical Interconnects, IEEE Computer Society, pages 306-322, April 1994.
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Douglas S. Reeves, Edward F. Gehringer, and Anil Claandiramani. Adaptive Routing and Deadlock Recovery: A Simulation Study. In Proceedings of the 4th Conference on Hypercube Concurrent Computers and Applications, March 1989.
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