Tradeoffs for VLSI models with subpolynomial delay

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Tradeoffs for VLSI models with subpolynomial delay

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Annual ACM Symposium on Theory of Computing archive
Proceedings of the seventeenth annual ACM symposium on Theory of computing table of contents

Providence, Rhode Island, United States

Pages: 59 - 68

Year of Publication: 1985

ISBN:0-89791-151-2

Author

A Aggarwal

IBM T. J. Watson Research Center, Yorktown Heights, NY

Sponsor

SIGACT: ACM Special Interest Group on Algorithms and Computation Theory

Publisher

ACM New York, NY, USA

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	Ag83	A. Aggarwal, "Period-time tradeoffs for VLSI models with delay," Proc. 24th FOCS, 1983, pp. 372- 383.
	BL81	S. N. Bhatt and C. E. Leiserson, "Minimizing the longest edge in a VLS} layout," Technical report, Lab for Computer Science, MIT, 1981.
	BPP82	G. Bilardi, M. Praeehi and F. P. Preparata, "A critique and appraisal of VLSI models of computation,'' IEEE J. on Solid State Circuits, Vol. SC-17, No. 4, Aug. 1982, pp. 696-702.
	CM81(a)	Bernard Chazelle , Louis Monier, A model of computation for VLSI with related complexity results, Proceedings of the thirteenth annual ACM symposium on Theory of computing, p.318-325, May 11-13, 1981, Milwaukee, Wisconsin, United States [doi>10.1145/800076.802485]
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	Lei81	F. T, Leighton, "Layouts for the shuffleexchange graph and I ower bound techniques for VLSI," Ph.D. thesis, Dept. of Math., MIT, 1981.
	LS81	Richard J. Lipton , Robert Sedgewick, Lower bounds for VLSI, Proceedings of the thirteenth annual ACM symposium on Theory of computing, p.300-307, May 11-13, 1981, Milwaukee, Wisconsin, United States [doi>10.1145/800076.802482]
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	NMB83	D. Nath, S. N. Maheshwari, and P. C. P. Bhatt, "Efficient VLSI networks for parallel processing based on orthogonal trees," IEEE Trans. on Comp., Vol. C-32, No. 6, July 1983, pp. 569-581.
	PRS81	M. S. Paterson , W. L. Ruzzo , L. Snyder, Bounds on minimax edge length for complete binary trees, Proceedings of the thirteenth annual ACM symposium on Theory of computing, p.293-299, May 11-13, 1981, Milwaukee, Wisconsin, United States [doi>10.1145/800076.802481]
	PV81	Franco P. Preparata , Jean Vuillemin, The cube-connected cycles: a versatile network for parallel computation, Communications of the ACM, v.24 n.5, p.300-309, May 1981 [doi>10.1145/358645.358660]
	Ra82	V. Ramachandran, "On drivi{ng many long wires in a VLSI layout," Proe. 23rd FOCS, 1982, pp. 369-378.
	Se79	C. L. Seitz, *'Self-timed VLSI systems," Caltech Conference on VLSI, 1979, pp. 345-354.
	Th80	Clark David Thompson, A complexity theory for vlsi, 1980
	Vu83	I. Vuillemin, "A combinatorial limit to the computing power of VLSI circuits," IEEE Trans. on Comp., Vot. C-30, No. 2, Feb. 1983, pp. 135-140.