| Externally hazard-free implementations of asynchronous circuits |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
table of contents
San Francisco, California, United States
Pages: 718 - 724
Year of Publication: 1995
ISBN:0-89791-725-1
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Downloads (6 Weeks): 4, Downloads (12 Months): 10, Citation Count: 2
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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T.A. Chu. Synthesis of Self-timed VLSI Circuits from Graph-theoretic Specifications. PhD thesis, MIT, June 1987.
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T. Jackson and A. Albicki. Analysis of metastable operation in D latches. IEEE Trans. on Circuits and Systems, 36(11):1392-1404, November 1989.
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Alex Kondratyev , Michael Kishinevsky , Bill Lin , Peter Vanbekbergen , Alex Yakovlev, Basic gate implementation of speed-independent circuits, Proceedings of the 31st annual conference on Design automation, p.56-62, June 06-10, 1994, San Diego, California, United States
[doi> 10.1145/196244.196275]
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L. Lavagno , K. Keutzer , A. Sangiovanni-Vincentelli, Algorithms for synthesis of hazard-free asynchronous circuits, Proceedings of the 28th conference on ACM/IEEE design automation, p.302-308, June 17-22, 1991, San Francisco, California, United States
[doi> 10.1145/127601.127685]
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M. H. Sawasaki. General Hazard-Free Synthesis of Asynchronous Circuits. PhD thesis, Katholieke Universiteit Leuven, February 1994.
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M. H. Sawasaki, C. Ykman-Couvreur, B. Lin, and H. De Man. Optimized synchronous logic synthesis mapped into hazard free asynchronous circuits. US Patent Filling Application, December 1993.
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L. Philips, I. Bolsens, B. Vanhoof, J. Vanhoof, and H. De Man. Silicon Integration of Digital User-end Mobile Communication Systems. In IEEE International Conference on Communications, May 1993.
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C.L. Seitz. System Timing. Inlntroduction to VLSI Systems, C.A. Mead and L.A. Conway, editors. Addison-Wesley, Chapter 7,1980.
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Ellen Sentovich , Kanwar Jit Singh , Cho W. Moon , Hamid Savoj , Robert K. Brayton , Alberto L. Sangiovanni-Vincentelli, Sequential Circuit Design Using Synthesis and Optimization, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.328-333, October 11-14, 1992
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K. van Berkel. Private communications. December, 1993.
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S. Vercauteren. Interface design for switchable single-rail to dual-rail conversion. EXACT internal report, IMEC, May 1994.
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ASSASSIN: A Synthesis System for Asynchronous Control Circuits. User and Tutorial Manual. IMEC, September, 1994.
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CITED BY 2
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Bill Lin , Gjalt de Jong , Tilman Kolks, Hierarchical optimization of asynchronous circuits, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.712-717, June 12-16, 1995, San Francisco, California, United States
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