Feedback, correlation, and delay concerns in the power estimation of VLSI circuits

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Feedback, correlation, and delay concerns in the power estimation of VLSI circuits

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 32nd annual ACM/IEEE Design Automation Conference table of contents

San Francisco, California, United States

Pages: 612 - 617

Year of Publication: 1995

ISBN:0-89791-725-1

Author

Farid N. Najm

ECE Dept. and Coordinated Science Lab., University of Illinois at Urbana-Champaign, Urbana, IL

Sponsors

EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 6, Citation Count: 4

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Farid N. Najm, A survey of power estimation techniques in VLSI circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.2 n.4, p.446-455, Dec. 1994 [doi>10.1109/92.335013]
	2	H. J. M. Veendrick, "Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits," IEEE Journal of Solid-State Circuits, vol. SC-19, no. 4, pp. 468-473, Aug. 1984.
	3	K. P. Parker and E. J. McCluskey, "Probabilistic treatment of general combinational networks," IEEE Transactions on Computers, vol. C-24, pp. 668-670, June 1975.
	4	Amelia Shen , Abhijit Ghosh , Srinivas Devadas , Kurt Keutzer, On average power dissipation and random pattern testability of CMOS combinational logic networks, Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design, p.402-407, November 1992, Santa Clara, California, United States
	5	Farid N. Najm, Transition density, a stochastic measure of activity in digital circuits, Proceedings of the 28th conference on ACM/IEEE design automation, p.644-649, June 17-22, 1991, San Francisco, California, United States [doi>10.1145/127601.127744]
	6	F. Najm, "Transition density : a new measure of activity in digital circuits," IEEE Transactions on Computer-Aided Design, vol. 12, no. 2, pp. 310-323, February 1993.
	7	Huzefa Mehta , Manjit Borah , Robert Michael Owens , Mary Jane Irwin, Accurate estimation of combinational circuit activity, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.618-622, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217599]
	8	Farid N. Najm , Michael Y. Zhang, Extreme delay sensitivity and the worst-case switching activity in VLSI circuits, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.623-627, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217600]
	9	Radu Marculescu , Diana Marculescu , Massoud Pedram, Efficient power estimation for highly correlated input streams, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.628-634, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217601]
	10	Farid N. Najm , Shashank Goel , Ibrahim N. Hajj, Power estimation in sequential circuits, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.635-640, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217602]
	11	R. Burch, F. Najm, P. Yang, and T. Trick, "A Monte Carlo approach for power estimation," IEEE Transactions on VLSI Systems, vol. 1, no. 1, pp. 63-71, March 1993.
	12	Michael G. Xakellis , Farid N. Najm, Statistical estimation of the switching activity in digital circuits, Proceedings of the 31st annual conference on Design automation, p.728-733, June 06-10, 1994, San Diego, California, United States [doi>10.1145/196244.196628]

CITED BY 4

	Luca P. Carloni , Patrick C. McGeer , Alexander Saldanha , Alberto L. Sangiovanni-Vincentelli, Trace driven logic synthesis—application to power minimization, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.581-588, November 09-13, 1997, San Jose, California, United States
	Bernhard Rohfleisch , Alfred Kölbl , Bernd Wurth, Reducing power dissipation after technology mapping by structural transformations, Proceedings of the 33rd annual conference on Design automation, p.789-794, June 03-07, 1996, Las Vegas, Nevada, United States
	Kara K. W. Poon , Steven J. E. Wilton , Andy Yan, A detailed power model for field-programmable gate arrays, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.10 n.2, p.279-302, April 2005
	N. Julien , S. Gailhard , E. Martin, Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT, Journal of VLSI Signal Processing Systems, v.35 n.2, p.195-211, September 2003