Accelerating concurrent hardware design with behavioural modelling and system simulation

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Accelerating concurrent hardware design with behavioural modelling and system simulation

Full text

Pdf (45 KB)

Source

Annual ACM IEEE Design Automation Conference archive
Proceedings of the 32nd annual ACM/IEEE Design Automation Conference table of contents

San Francisco, California, United States

Pages: 528 - 533

Year of Publication: 1995

ISBN:0-89791-725-1

Authors

Allan Silburt	Bell Northern Research, P.O. Box 3511, Station C, Ottawa, Ontario, Canada K1Y 4H7
Ian Perryman	Bell Northern Research, P.O. Box 3511, Station C, Ottawa, Ontario, Canada K1Y 4H7
Janick Bergeron	AnalySYS Inc., 25 Loiselle St. Suite 201, Embrun, Ontario, Canada K0A 1W1
Stacy Nichols	Bell Northern Research, P.O. Box 3511, Station C, Ottawa, Ontario, Canada K1Y 4H7
Mario Dufresne	Bell Northern Research, P.O. Box 3511, Station C, Ottawa, Ontario, Canada K1Y 4H7
Greg Ward	Bell Northern Research, P.O. Box 3511, Station C, Ottawa, Ontario, Canada K1Y 4H7

Sponsors

EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 6, Citation Count: 3

Additional Information:

references cited by index terms collaborative colleagues

Tools and Actions:	Request Permissions Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/217474.217582 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	A. Mendelsohn, "Now you're talking: verification strategy shapes telephony," Computer Design, vol. 33, no. 10, pp. 103-110, September, 1994.
	2	M. Hsu, "What you should expect the system simulation engineer you're going to hire to do", Proc. VHDL International Users Forum, pp. 11.1 - 11.6, Nov. 1994
	3	E. Parrella and M. Tota, "Behavioral testbenches for telecommunications chipset development", Proc. VHDL International Users Forum, pp. 12.27-12.33, Nov. 1994

CITED BY 3

	Adrian Evans , Allan Silburt , Gary Vrckovnik , Thane Brown , Mario Dufresne , Geoffrey Hall , Tung Ho , Ying Liu, Functional verification of large ASICs, Proceedings of the 35th annual conference on Design automation, p.650-655, June 15-19, 1998, San Francisco, California, United States
	A. Hoffman , T. Kogel , H. Meyr, A framework for fast hardware-software co-simulation, Proceedings of the conference on Design, automation and test in Europe, p.760-765, March 2001, Munich, Germany
	Matthias Bauer , Wolfgang Ecker, Hardware/software co-simulation in a VHDL-based test bench approach, Proceedings of the 34th annual conference on Design automation, p.774-779, June 09-13, 1997, Anaheim, California, United States