Power optimal buffered clock tree design

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Power optimal buffered clock tree design

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 32nd annual ACM/IEEE Design Automation Conference table of contents

San Francisco, California, United States

Pages: 497 - 502

Year of Publication: 1995

ISBN:0-89791-725-1

Authors

Ashok Vittal	Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA
Malgorzata Marek-Sadowska	Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA

Sponsors

EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 43, Citation Count: 14

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 14

	Jason Cong , Andrew B. Kahng , Cheng-Kok Koh , C.-W. Albert Tsao, Bounded-skew clock and Steiner routing, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.3 n.3, p.341-388, July 1998
	Massoud Pedram, Power minimization in IC design: principles and applications, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.1 n.1, p.3-56, Jan. 1996
	Jatuchai Pangjun , Sachin S. Sapatnekar, Clock distribution using multiple voltages, Proceedings of the 1999 international symposium on Low power electronics and design, p.145-150, August 16-17, 1999, San Diego, California, United States
	Atsushi Takahashi , Kazunori Inoue , Yoji Kajitani, Clock-tree routing realizing a clock-schedule for semi-synchronous circuits, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.260-265, November 09-13, 1997, San Jose, California, United States
	I-Min Liu , Tan-Li Chou , Adnan Aziz , D. F. Wong, Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertion, Proceedings of the 2000 international symposium on Physical design, p.33-38, May 2000, San Diego, California, United States
	Ashok Vittal , Hein Ha , Forrest Brewer , Malgorzata Marek-Sadowska, Clock skew optimization for ground bounce control, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.395-399, November 10-14, 1996, San Jose, California, United States
	Jatuchai Pangjun , Sachin S. Sapatnekar, Low-power clock distribution using multiple voltages and reduced swings, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.3, p.309-318, June 2002
	Andrew B. Kahng , C.-W. Albert Tsao, Practical Bounded-Skew Clock Routing, Journal of VLSI Signal Processing Systems, v.16 n.2-3, p.199-215, June/July 1997
	Massoud Pedram , Hirendu Vaishnav, Power Optimization in VLSI Layout: A Survey, Journal of VLSI Signal Processing Systems, v.15 n.3, p.221-232, March 1997
	Shih-Hsu Huang , Chia-Ming Chang , Yow-Tyng Nieh, Fast multi-domain clock skew scheduling for peak current reduction, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
	Rupesh S. Shelar, An efficent clustering algorithm for low power clock tree synthesis, Proceedings of the 2007 international symposium on Physical design, March 18-21, 2007, Austin, Texas, USA
	Jacob Minz , Xin Zhao , Sung Kyu Lim, Buffered clock tree synthesis for 3D ICs under thermal variations, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
	Yow-Tyng Nieh , Shih-Hsu Huang , Sheng-Yu Hsu, Opposite-Phase Clock Tree for Peak Current Reduction, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, v.E90-A n.12, p.2727-2735, December 2007
	Rupesh S. Shelar, An algorithm for routing with capacitance/distance constraints for clock distribution in microprocessors, Proceedings of the 2009 international symposium on Physical design, March 29-April 01, 2009, San Diego, California, USA