Interfacing incompatible protocols using interface process generation

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Interfacing incompatible protocols using interface process generation

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 32nd annual ACM/IEEE Design Automation Conference table of contents

San Francisco, California, United States

Pages: 468 - 473

Year of Publication: 1995

ISBN:0-89791-725-1

Authors

Sanjiv Narayan	Viewlogic Systems Inc., Marlboro, MA
Daniel D. Gajski	Dept. of Computer Science, Univ. of California, Irvine, CA

Sponsors

EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 13, Citation Count: 20

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	G. Borriello and R. Katz, "Synthesis and optimization of interface transducer logic," in Proc. of the ICCAD, 1987.
	2	Gaetano Borriello , Randy H. Katz, A new interface specification methodology and its application to transducer synthesis, 1988
	3	Janaki Akella , Kenneth L. McMillan, Synthesizing Converters Between Finite State Protocols, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.410-413, October 14-16, 1991
	4	Janaki Akella, Input/output performance modeling and interface synthesis in concurrently communicating systems, Carnegie Mellon University, Pittsburgh, PA, 1992
	5	Jane S. Sun , Robert W. Brodersen, Design of system interface modules, Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design, p.478-481, November 1992, Santa Clara, California, United States
	6	J. Sun, M. Srivastava, and R. Brodersen, "SIERA: A CAD environment for real-time systems," in 3rd Physical Design Workshop, 1991.
	7	D. Gajski, F. Vahid, and S. Narayan, "A systemdesign methodology: Executable-specification refinement," in Proc. of European Design ~ Test Conf. 1994.
	8	"RSP Engineering Report." Rockwell Intl., 1991.

CITED BY 20

	Roberto Passerone , James A. Rowson , Alberto Sangiovanni-Vincentelli, Automatic synthesis of interfaces between incompatible protocols, Proceedings of the 35th annual conference on Design automation, p.8-13, June 15-19, 1998, San Francisco, California, United States
	L. Freund , M. Israel , F. Rousseau , J. M. Bergé , M. Auguin , C. Belleudy , G. Gogniat, A codesign experiment in acoustic echo cancellation: GMDF&agr;, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.2 n.4, p.365-383, Oct. 1997
	Ki-Seok Chung , Rajesh K. Gupta , C. L. Liu, An algorithm for synthesis of system-level interface circuits, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.442-447, November 10-14, 1996, San Jose, California, United States
	Kanishka Lahiri , Anand Raghunathan , Ganesh Lakshminarayana , Sujit Dey, Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips, Proceedings of the 37th conference on Design automation, p.513-518, June 05-09, 2000, Los Angeles, California, United States
	G. Gogniat , M. Auguin , L. Bianco , A. Pegatoquet, A codesign back-end approach for embedded system design, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.3, p.492-509, July 2000
	Young Moo Lee , Kyu Ho Park, A protocol converter for nonblocking protocols, Integration, the VLSI Journal, v.33 n.1, p.71-88, December 2002
	Hoon Choi , Ju Hwan Yi , Jong-Yeol Lee , In-Cheol Park , Chong-Min Kyung, Exploiting intellectual properties in ASIP designs for embedded DSP software, Proceedings of the 36th ACM/IEEE conference on Design automation, p.939-944, June 21-25, 1999, New Orleans, Louisiana, United States
	Partha S. Roop , A. Sowmya , S. Ramesh, Forced simulation: A technique for automating component reuse in embedded systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.6 n.4, p.602-628, October 2001
	Jean-Marc Daveau , Gilberto Fernandes Marchioro , Tarek Ben-Ismail , Ahmed Amine Jerraya, Protocol selection and interface generation for HW-SW codesign, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	Kayhan Küçükçakar, Analysis of emerging core-based design lifecycle, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.445-449, November 08-12, 1998, San Jose, California, United States
	Nacer-Eddine Zergainoh , Ludovic Tambour , Ahmed A. Jerraya, Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.14 n.4, p.349-360, April 2006
	Ki-Seok Chung , Rajesh K. Gupta , Taewhan Kim , C. L. Liu, Synthesis and Optimization of Combinational Interface Circuits, Journal of VLSI Signal Processing Systems, v.31 n.3, p.243-261, July 2002
	Felice Balarin , Roberto Passerone, Functional verification methodology based on formal interface specification and transactor generation, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
	Philippe Coussy , Emmanuel Casseau , Pierre Bomel , Adel Baganne , Eric Martin, A formal method for hardware IP design and integration under I/O and timing constraints, ACM Transactions on Embedded Computing Systems (TECS), v.5 n.1, p.29-53, February 2006
	Andreas Koch, Efficient integration of pipelined IP blocks into automatically compiled datapaths, EURASIP Journal on Embedded Systems, v.2007 n.1, p.9-9, January 2007
	Laurent Freund , Denis Dupont , Michel Israel , Frederic Rousseau, Interface Optimization During Hardware-Software Partitioning, Proceedings of the 5th International Workshop on Hardware/Software Co-Design, p.75, March 24-26, 1997
	Frank Vahid , Linus Tauro, An Object-Oriented Communication Library for Hardware-Software CoDesign, Proceedings of the 5th International Workshop on Hardware/Software Co-Design, p.81, March 24-26, 1997
	Karin Avnit , Vijay D'Silva , Arcot Sowmya , S. Ramesh , Sri Parameswaran, A formal approach to the protocol converter problem, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
	Nicola Bombieri , Nicola Deganello , Franco Fummi, Integrating RTL IPs into TLM designs through automatic transactor generation, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
	K. Avnit , V. D'silva , A. Sowmya , S. Ramesh , S. Parameswaran, Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.14 n.2, p.1-41, March 2009