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Mixed-signal switching noise analysis using Voronoi-tessellated substrate macromodels
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 32nd annual ACM/IEEE Design Automation Conference table of contents
San Francisco, California, United States
Pages: 439 - 444  
Year of Publication: 1995
ISBN:0-89791-725-1
Authors
Ivan L. Wemple  Department of Electrical Engineering, University of Washington
Andrew T. Yang  Department of Electrical Engineering, University of Washington
Sponsors
EDAC : Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 8,   Citation Count: 9
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
T.A. Johnson, R.W. Knepper, V. Marcello, and W. Wang, "Chip Substrate Resistance Modeling Technique for Integrated Circuit Design", IEEE Transactions on Computer-Aided Design, vol. CAD-3, no. 2, pp. 126-134, April 1984.
 
2
D.K. Su, M.J. Loinaz, S. Masui, and B.A. Wooley, "Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits", IEEE Journal of Solid-State Circuits, vol. 28, no. 4, pp. 420-430, April 1993.
 
3
S. Kumashiro, R.A. Rohrer, and A.J. Strojwas, "A New Efficient Method for the Transient Simulation of Three-Dimensional Interconnect Structures", P~vceedings of the IEEE International Elect~vn Devices Meeting, pp. 193-196, 1990.
 
4
N.K. Verghese, D.J. Allstot, and S. Masui, "Rapid Simulation of Substrate Coupling Effects in Mixed-Mode ICs", IEEE 1993 Custom Integrated Circuits Conference, pp. 18.3.1-18.3.4.
 
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B.R. Stanisic, N.K. Verghese, R.A. Rutenbar, L.R. Carley, and D.J. Allstot, "Addressing Substrate Coupling in Mixed-Mode ICs: Simulation and Power Distribution Synthesis", IEEE Journal of Solid-State Circuits, vol. 29, no. 3, pp. 226-238, March 1994.
 
7
F. Clement, E. Zysman, M. Kayal, and M. Declercq, "LAYIN: Toward a Global Solution for Parasitic Coupling Modeling and Visualization", IEEE 1994 Custom Integrated Circuits Conference, pp. 537-540.
 
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10
S. Fortune, "A Sweepline Algorithm for Voronoi Diagrams", Algorithmica, 2, pp. 153-174, 1987.
 
11
TMA MEDICI: Two-Dimensional Device Simulation Program, Technology Modeling Associates, Inc., Palo Alto, CA, Vols. 1 & 2, 1992.
 
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CITED BY  9

Collaborative Colleagues:
Ivan L. Wemple: colleagues
Andrew T. Yang: colleagues