| Efficient reduced-order modeling of frequency-dependent coupling inductances associated with 3-D interconnect structures |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
table of contents
San Francisco, California, United States
Pages: 376 - 380
Year of Publication: 1995
ISBN:0-89791-725-1
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Authors
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L. Miguel Silveira
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Research Laboratory of Electronics, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA
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Mattan Kamon
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Research Laboratory of Electronics, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA
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Jacob White
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Research Laboratory of Electronics, Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA
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Downloads (6 Weeks): 0, Downloads (12 Months): 8, Citation Count: 45
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 45
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Tao Lin , Emrah Acar , Lawrence Pileggi, h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.19-25, November 08-12, 1998, San Jose, California, United States
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Ying Liu , Lawrence T. Pileggi , Andrzej J. Strojwas, Model order-reduction of RC(L) interconnect including variational analysis, Proceedings of the 36th ACM/IEEE conference on Design automation, p.201-206, June 21-25, 1999, New Orleans, Louisiana, United States
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Mattan Kamon , Steven S. Majors, Package and interconnect modeling of the HFA3624, a 2.4GHz RF to IF converter, Proceedings of the 33rd annual conference on Design automation, p.2-7, June 03-07, 1996, Las Vegas, Nevada, United States
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Andrew B. Kahng , Sudhakar Muddu , Egino Sarto, On switch factor based analysis of coupled RC interconnects, Proceedings of the 37th conference on Design automation, p.79-84, June 05-09, 2000, Los Angeles, California, United States
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Altan Odabasioglu , Mustafa Celik , Lawrence T. Pileggi, Practical considerations for passive reduction of RLC circuits, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.214-220, November 07-11, 1999, San Jose, California, United States
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Nuno Marques , Mattan Kamon , Jacob White , L. Miguel Silveira, A mixed nodal-mesh formulation for efficient extraction and passive reduced-order modeling of 3D interconnects, Proceedings of the 35th annual conference on Design automation, p.297-302, June 15-19, 1998, San Francisco, California, United States
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Paul D. Gross , Ravishankar Arunachalam , Karthik Rajagopal , Lawrence T. Pileggi, Determination of worst-case aggressor alignment for delay calculation, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.212-219, November 08-12, 1998, San Jose, California, United States
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M. Kamon , N. Marques , Y. Massoud , L. Silveira , J. White, Interconnect analysis: from 3-D structures to circuit models, Proceedings of the 36th ACM/IEEE conference on Design automation, p.910-914, June 21-25, 1999, New Orleans, Louisiana, United States
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H. Levy , W. Scott , D. MacMillen , Jacob White, A rank-one update method for efficient processing of interconnect parasitics in timing analysis, Proceedings of the 37th conference on Design automation, p.75-78, June 05-09, 2000, Los Angeles, California, United States
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Mattan Kamon , Steve McCormick , Ken Sheperd, Interconnect parasitic extraction in the digital IC design methodology, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.223-231, November 07-11, 1999, San Jose, California, United States
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Altan Odabasioglu , Mustafa Celik , Lawrence T. Pileggi, PRIMA: passive reduced-order interconnect macromodeling algorithm, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.58-65, November 09-13, 1997, San Jose, California, United States
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Luca Daniel , Chin Siong Ong , Sok Chay Low , Kwok Hong Lee , Jacob White, Geometrically parameterized interconnect performance models for interconnect synthesis, Proceedings of the 2002 international symposium on Physical design, April 07-10, 2002, San Diego, CA, USA
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Anil Samavedam , Karti Mayaram , Terri Fiez, A scalable substrate noise coupling model for mixed-signal ICs, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.128-131, November 07-11, 1999, San Jose, California, United States
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Ki-Wook Kim , Seong-Ook Jung , Taewhan Kim , Prashant Saxena , C. L. Liu , Sung-Mo Kang, Coupling delay optimization by temporal decorrelation using dual threshold voltage technique, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.5, p.879-887, October 2003
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Xiaoji Ye , Peng Li , Min Zhao , Rajendran Panda , Jiang Hu, Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding, Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, November 05-08, 2007, San Jose, California
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Peng Li , Frank Liu , Xin Li , Lawrence T. Pileggi , Sani R. Nassif, Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction, Proceedings of the conference on Design, Automation and Test in Europe, p.958-963, March 07-11, 2005
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Lihong Feng , Xuan Zeng , Charles Chiang , Dian Zhou , Qiang Fang, Direct Nonlinear Order Reduction with Variational Analysis, Proceedings of the conference on Design, automation and test in Europe, p.21316, February 16-20, 2004
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