| Timing driven placement for large standard cell circuits |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
table of contents
San Francisco, California, United States
Pages: 211 - 215
Year of Publication: 1995
ISBN:0-89791-725-1
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Authors
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William Swartz
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TimberWolf Systems, Inc., 10880 Cassandra Way, Dallas, TX
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Carl Sechen
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Department of Electrical Engineering, University of Washington, Seattle, Washington
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| Bibliometrics |
Downloads (6 Weeks): 6, Downloads (12 Months): 26, Citation Count: 55
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Wilm E. Donath , Reini J. Norman , Bhuwan K. Agrawal , Stephen E. Bello , Sang Yong Han , Jerome M. Kurtzberg , Paul Lowy , Roger I. McMillan, Timing driven placement using complete path delays, Proceedings of the 27th ACM/IEEE conference on Design automation, p.84-89, June 24-27, 1990, Orlando, Florida, United States
[doi> 10.1145/123186.123232]
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S.E. Dreyfus, "An Appraisal of Some Shortest-Path Algorithms," Operations Research, Vol. 17, 1969, pp. 395- 412.
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A. E. Dunlop , V. D. Agrawal , D. N. Deutsch , M. F. Jukl , P. Kozak , M. Wiesel, Chip layout optimization using critical path weighting, Proceedings of the 21st conference on Design automation, p.133-136, June 25-27, 1984, Albuquerque, New Mexico, United States
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T. Gao, P. M. Vidya, and C. L. Liu, "A New Performance Driven Placement Algorithm," Proc. Int. Conf. on Computed- Aided Design, November 1991, pp. 44-47.
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T. Gao , P. M. Vaidya , C. L. Liu, A performance driven macro-cell placement algorithm, Proceedings of the 29th ACM/IEEE conference on Design automation, p.147-152, June 08-12, 1992, Anaheim, California, United States
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T. Hasegawa, "A New Placement Algorithm Minimizing Path Delays," Proc. Int. Conf. on Computed-Aided Design, 1991, pp. 2052-2055.
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P. Hauge, R. Nair, and E. Yoffa, "Circuit Placement for Predictable Performance." Proc. Int. Conf. on Computed- Aided Design, 1987, pp. 88-91.
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R.B. Hitchcock, G. L. Smith, D. D. Cheng, "Timing analysis of computer hardware," IBM Journal of Research and Development, Vol 24, No. 1, Jan. 1983, pp. 100-105.
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M. Jackson, E. Kuh, and M. Marek-Sadowska, "Timing- Driven Routing for Building Block Layout," Proc. of Int. Symp. Circuits and Systems, 1987, pp. 518-519.
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E. Lawler, Combinatorial Optimization: Networks and Matroids (New York: Holt, Rinehart, and Winston, 1976), pp. 98-106.
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M. Marek-Sadowska and S. Lin, "Timing Driven Placement." Proc. Int. Conf. on Computed-Aided Design, 1989, pp. 94-97.
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W. Swartz and C. Sechen, "New Algorithms for the Placement and Routing of Macro Cells," Proc. Int. Conf. on Computed- Aided Design, 1990, pp. 336-339.
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Masayuki Terai , Kazuhiro Takahashi , Koji Sato, A new min-cut placement algorithm for timing assurance layout design meeting net length constraint, Proceedings of the 27th ACM/IEEE conference on Design automation, p.96-102, June 24-27, 1990, Orlando, Florida, United States
[doi> 10.1145/123186.123234]
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J.Y. Yen, "Finding the K Shortest Loopless Paths in a Network," Management Science, Vol. 17, July 1971, pp. 712- 716.
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CITED BY 55
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J. Song , Z. Shen , W. Zhuang, An effective general connectivity concept for clustering, Proceedings of the conference on Design, automation and test in Europe, p.398-405, February 23-26, 1998, Le Palais des Congrés de Paris, France
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Maogang Wang , Xiaojian Yang , Kenneth Eguro , Majid Sarrafzadeh, Multi-center congestion estimation and minimization during placement, Proceedings of the 2000 international symposium on Physical design, p.147-152, May 2000, San Diego, California, United States
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Jason Cong , Zhigang Pan , Lei He , Cheng-Kok Koh , Kei-Yong Khoo, Interconnect design for deep submicron ICs, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.478-485, November 09-13, 1997, San Jose, California, United States
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Andrew E. Caldwell , Andrew B. Kahng , Igor L. Markov, Can recursive bisection alone produce routable placements?, Proceedings of the 37th conference on Design automation, p.477-482, June 05-09, 2000, Los Angeles, California, United States
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Bill Halpin , C. Y. Roger Chen , Naresh Sehgal, A sensitivity based placer for standard cells, Proceedings of the 10th Great Lakes symposium on VLSI, p.193-196, March 02-04, 2000, Chicago, Illinois, United States
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Charles J. Alpert , Tony F. Chan , Dennis J.-H. Huang , Andrew B. Kahng , Igor L. Markov , Pep Mulet , Kenneth Yan, Faster minimization of linear wirelength for global placement, Proceedings of the 1997 international symposium on Physical design, p.4-11, April 14-16, 1997, Napa Valley, California, United States
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H. Chang , E. Shragowitz , J. Liu , H. Youssef , B. Lu , S. Sutanthavibul, Net criticality revisited: an effective method to improve timing in physical design, Proceedings of the 2002 international symposium on Physical design, April 07-10, 2002, San Diego, CA, USA
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S. A. Senouci , A. Amoura , H. Krupnova , G. Saucier, Timing driven floorplanning on programmable hierarchical targets, Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays, p.85-92, February 22-25, 1998, Monterey, California, United States
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Andrew B. Kahng , Stefanus Mantik , Igor L. Markov , Miodrag Potkonjak , Paul Tucker , Huijuan Wang , Gregory Wolfe, Robust IP watermarking methodologies for physical design, Proceedings of the 35th annual conference on Design automation, p.782-787, June 15-19, 1998, San Francisco, California, United States
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Saurabh N. Adya , Mehmet C. Yildiz , Igor L. Markov , Paul G. Villarrubia , Phiroze N. Parakh , Patrick H. Madden, Benchmarking for large-scale placement and beyond, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA
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Sung-Woo Hur , Tung Cao , Karthik Rajagopal , Yegna Parasuram , Amit Chowdhary , Vladimir Tiourin , Bill Halpin, Force directed mongrel with physical net constraints, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
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Alexander Marquardt , Vaughn Betz , Jonathan Rose, Timing-driven placement for FPGAs, Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays, p.203-213, February 10-11, 2000, Monterey, California, United States
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Alexander Marquardt , Vaughn Betz , Jonathan Rose, Timing-driven placement for FPGAs, Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays, p.203-213, February 10-11, 2000, Monterey, California, United States
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Ateen Khatkhate , Chen Li , Ameya R. Agnihotri , Mehmet C. Yildiz , Satoshi Ono , Cheng-Kok Koh , Patrick H. Madden, Recursive bisection based mixed block placement, Proceedings of the 2004 international symposium on Physical design, April 18-21, 2004, Phoenix, Arizona, USA
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Karthik Rajagopal , Tal Shaked , Yegna Parasuram , Tung Cao , Amit Chowdhary , Bill Halpin, Timing driven force directed placement with physical net constraints, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA
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Prashant Saxena , Noel Menezes , Pasquale Cocchini , Desmond A. Kirkpatrick, The scaling challenge: can correct-by-construction design help?, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA
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Pradeep Ramachandaran , Ameya R. Agnihotri , Satoshi Ono , Purushothaman Damodaran , Krishnaswami Srihari , Patrick H. Madden, Optimal placement by branch-and-price, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
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Taraneh Taghavi , Foad Dabiri , Ani Nahapetian , Majid Sarrafzadeh, Tutorial on congestion prediction, Proceedings of the 2007 international workshop on System level interconnect prediction, March 17-18, 2007, Austin, Texas, USA
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Ameya Agnihotri , Mehmet Can YILDIZ , Ateen Khatkhate , Ajita Mathur , Satoshi Ono , Patrick H. Madden, Fractional Cut: Improved Recursive Bisection Placement, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.307, November 09-13, 2003
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