VLSI Layout as Programming

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VLSI Layout as Programming

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ACM Transactions on Programming Languages and Systems (TOPLAS) archive
Volume 5 , Issue 3 (July 1983) table of contents

Pages: 405 - 421

Year of Publication: 1983

ISSN:0164-0925

Authors

Richard J. Lipton	Department of Electrical Engineering and Computer Science, School of Engineering/Applied Science, Engineering Quadrangle, Princeton University, Princeton, NJ
Jacobo Valdes	Department of Electrical Engineering and Computer Science, School of Engineering/Applied Science, Engineering Quadrangle, Princeton University, Princeton, NJ
Gopalakrishnan Vijayan	Department of Electrical Engineering and Computer Science, School of Engineering/Applied Science, Engineering Quadrangle, Princeton University, Princeton, NJ
Stephen C. North	Department of Electrical Engineering and Computer Science, School of Engineering/Applied Science, Engineering Quadrangle, Princeton University, Princeton, NJ and Bell Laboratories, 600 Mountain Avenue, Murray Hill, NJ
Robert Sedgewick	Computer Science Department, Brown University, Providence, RI

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 30, Citation Count: 3

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	ACKLAND, B., AND WESTE, N. A pragmatic approach to topological symbolic IC design. In VLSI '81, J.P. Gray (Ed.). Academic Press, New York, 1981, pp. 117-129.
	2	ASPVALL, B., AND SHILOACH, Y. A polynomial time algorithm for solving systems of linear inequalities with two variables per inequality. In 20th Annual Symposium on Foundations of Computer Science, San Juan, P.R., Oct. 29-31, 1979, pp. 205-217.
	3	BATALI, J., MAYLE, N., SHROBE, H., SUSSMAN, G., AND WEISE, D. The DPL/Daedalus design environment. In VLSI '81, J.P. Gray (Ed.). Academic Press, New York, 1981, pp. 183-192.
	4	DAVIS, T., AND CLARK, g. SILT: A VLSI design language (preliminary draft). Unpublished manuscript, Digital Systems Laboratory, Stanford Univ., Stanford, Calif.
	5	EICHEMBERaER, P. Lava: An IC layout language. Unpublished manuscript, Electronics Research Laboratory, Stanford Univ., Stanford, Calif.
	6	Douglas G. Fairbairn , James A. Rowson, ICARUS: An interactive integrated circuit layout program, Proceedings of the 15th conference on Design automation, p.188-192, June 19-21, 1978, Las Vegas, Nevada, United States
	7	D. Franco , L. Reed, The Cell Design System, Proceedings of the 18th conference on Design automation, p.240-247, June 29-July 01, 1981, Nashville, Tennessee, United States
	8	Dan Holt , Steve Sapiro, BOLT-a block oriented design specification language, Proceedings of the 18th conference on Design automation, p.276-279, June 29-July 01, 1981, Nashville, Tennessee, United States
	9	Dave Johannsen, Bristle Blocks: A silicon compiler, Proceedings of the 16th Conference on Design automation, p.310-313, June 25-27, 1979, San Diego, CA, United States
	10	JOHNSON, S.C. The LSI design language i. Bell Laboratories, Murray Hill, N.J. Unpublished manuscript.
	11	Richard J. Lipton , Stephen C. North , Robert Sedgewick , Jacobo Valdes , Gopalakrishanan Vijayan, ALI: A procedural language to describe VLSI layouts, Proceedings of the 19th conference on Design automation, p.467-474, January 1982
	12	Richard J. Lipton , Robert Sedgewick , Jacobo Valdes, Programming aspects of VLSI: (preliminary version), Proceedings of the 9th ACM SIGPLAN-SIGACT symposium on Principles of programming languages, p.57-65, January 25-27, 1982, Albuquerque, Mexico [doi>10.1145/582153.582160]
	13	Carver Mead , Lynn Conway, Introduction to VLSI Systems, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1979
	14	MOSLELLER, R.C. REST: A leaf cell design system. In VLSI '81, J.P. Gray (Ed.). Academic Press, New York, 1981, pp. 163-172.
	15	SASTRY, S., AND KLEIN, S. PLATES: A metric free VLSI layout language. In Proceedings of the 1982 Conference on Advanced Research in VLSI, 1982, pp. 165-169.
	16	Stephen Trimberger, Combining graphics and a layout language in a single interactive system, Proceedings of the 18th conference on Design automation, p.234-239, June 29-July 01, 1981, Nashville, Tennessee, United States
	17	VIJAYAN, G. Completeness of VLSI layouts. VLSI Memo 1, Dept. of Electrical Engineering and Computer Science, Princeton Univ., Princeton, N.J., Sept. 1982.
	18	WILLIAMS, J.D. STICKS--A graphical compiler for high level LSI design. In AFIPS Conference Proceedings, vol. 47:1978 National Computer Conference (Anaheim, Calif., June 5-8, 1978). AFIPS Press, Arlington, Va., 1978, pp. 289-295.

CITED BY 3

	Wayne Bower , Carl Seaquist , Wayne Wolf, A framework for industrial layout generators, Proceedings of the 27th ACM/IEEE conference on Design automation, p.419-424, June 24-27, 1990, Orlando, Florida, United States
	V Vijayan, Geometry of planar graphs with angles, Proceedings of the second annual symposium on Computational geometry, p.116-124, June 02-04, 1986, Yorktown Heights, New York, United States
	P. Bondono , A. A. Jerraya , A. Hornik , B. Courtois , D. Bonifas, NAUTILE: a safe environment for silicon compilation, Proceedings of the conference on European design automation, March 12-15, 1990, Glasgow, Scotland