Upper bounds to processor-time tradeoffs under bounded-speed message propagation

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Upper bounds to processor-time tradeoffs under bounded-speed message propagation

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ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the seventh annual ACM symposium on Parallel algorithms and architectures table of contents

Santa Barbara, California, United States

Pages: 185 - 194

Year of Publication: 1995

ISBN:0-89791-717-0

Authors

Gianfranco Bilardi	Dipartimento di Elettronica ed Informatica, Università di Padova, 35131 Padova, Italy
Franco P. Preparata	Department of Computer Science, Brown University, Providence, RI

Sponsors

European Theoretical :
IEEE : Institute of Electrical and Electronics Engineers
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 17, Citation Count: 3

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	AACS87	A. Aggarwal , B. Alpern , A. Chandra , M. Snir, A model for hierarchical memory, Proceedings of the nineteenth annual ACM conference on Theory of computing, p.305-314, January 1987, New York, New York, United States [doi>10.1145/28395.28428]
	BP92	Gianfranco Bilardi , Franco P. Preparata, Horizons of parallel computation, Journal of Parallel and Distributed Computing, v.27 n.2, p.172-182, June 1995 [doi>10.1006/jpdc.1995.1080]
	BP95a	Gianfranco Bilardi , Franco Preparata, Processor-Time Tradeoffs under Bounded-Speed Message Propagation: Part I, Upper Boundes, Brown University, Providence, RI, 1995
	BP95b	G. Bilardi and F.P. Preparata. Lower Bounds on Processor-Time Tradeoffs under Bounded-Speed Message Propagation. Manuscript, 1995.
	B74	Richard P. Brent, The Parallel Evaluation of General Arithmetic Expressions, Journal of the ACM (JACM), v.21 n.2, p.201-206, April 1974 [doi>10.1145/321812.321815]
	CR73	S.A. Cook and R.A. Reckhow. Time Bounded Random Access Machines. Journal of Comput. System Science, 7:354-375, 1973.
	J92	Joseph JáJá, An introduction to parallel algorithms, Addison Wesley Longman Publishing Co., Inc., Redwood City, CA, 1992
	S95	John E. Savage, Space-Time Tradeoffs in Memory Hierarchies, Brown University, Providence, RI, 1994
	S86	Lawrence Snyder, Type architectures, shared memory, and the corollary of modest potential, Annual review of computer science vol. 1, 1986, Annual Reviews Inc., Palo Alto, CA, 1986

CITED BY 3

	Matteo Frigo , Volker Strumpen, Cache oblivious stencil computations, Proceedings of the 19th annual international conference on Supercomputing, June 20-22, 2005, Cambridge, Massachusetts
	Matteo Frigo , Volker Strumpen, The cache complexity of multithreaded cache oblivious algorithms, Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures, July 30-August 02, 2006, Cambridge, Massachusetts, USA
	Matteo Frigo , Volker Strumpen, The memory behavior of cache oblivious stencil computations, The Journal of Supercomputing, v.39 n.2, p.93-112, February 2007