High-level bit-serial datapath synthesis for multi-FPGA systems

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High-level bit-serial datapath synthesis for multi-FPGA systems

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International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays table of contents

Monterey, California, United States

Pages: 167 - 173

Year of Publication: 1995

ISBN:0-89791-743-X

Authors

Tsuyoshi Isshiki	Applied Sciences Building, Computer Engineering, University of California, Santa Cruz, CA
Wayne Wei-Ming Dai	Applied Sciences Building, Computer Engineering, University of California, Santa Cruz, CA

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 12, Citation Count: 2

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	P. Bertin, D. Roncin and J. Vuillemin, "Programmable Active Memories- Performance Measurements," Proc. A CM/SIGDA Workshop on Field Programmable Gate Arrays, 1992.
	2	P. Bertin and H. Touati, "PAM Programming Environments: Practice and Experience," Proc. IEEE Workshop on FPGAs for Custom Computing Machines, April 1994.
	3	C.E. Cox and W. E. Blanz, "GANGLION-A Fast Field- Programmble Gate Array Implementation of a Connectionist Classifier," IEEE Solid-State Circuits Vol. 27, No. 3, pp. 288-299, March 1992.
	4	C. M. Fiduccia , R. M. Mattheyses, A linear-time heuristic for improving network partitions, Papers on Twenty-five years of electronic design automation, p.241-247, June 1988 [doi>10.1145/62882.62910]
	5	Maya Gokhale , William Holmes , Andrew Kopser , Sara Lucas , Ronald Minnich , Douglas Sweely , Daniel Lopresti, Building and Using a Highly Parallel Programmable Logic Array, Computer, v.24 n.1, p.81-89, January 1991 [doi>10.1109/2.67197]
	6	Dzung T. Hoang, "Searching Genetic Databases on Splash 2," Proc. IEEE Workshop on FPGAs for Custom Computing Machines, pp. 185-191, April 1993.
	7	Tsuyoshi Isshiki , Wayne Wei-Ming Dai, Hight-Performance Datapath Implementation on Field-Programmable Multi-Chip Module (FPMCM), Proceedings of the 4th International Workshop on Field-Programmable Logic and Applications: Field-Programmable Logic, Architectures, Synthesis and Applications, p.373-384, September 07-09, 1994
	8	T. Isshiki and W. W.-M. Dai, "Field-Programmable Multi-Chip Module (FPMCM) for High-Performance DSP Accelerator," IEEE Asia-Pacific Conference on Circuits and Systems, Dec. 1994.
	9	Jan Vanhoof , Ivo Bolsens , Karl Van Rompaey , Gert Goossens , Hug De Man, High-Level Synthesis for Real-Time Digital Signal Processing, Kluwer Academic Publishers, Norwell, MA, 1993
	10	"The Programmable Logic Data Book," XiIinz, Inc., 1994.

CITED BY 2

	Michael X. Wang , Katsuharu Suzuki , Wayne W.-M. Dai , Yee L. Low , Kevin J. O'conner , King L. Tai, Integration of large-scale FPGA and DRAM in a package using chip-on-chip technology, Proceedings of the 2000 conference on Asia South Pacific design automation, p.205-210, January 2000, Yokohama, Japan
	André DeHon, The Density Advantage of Configurable Computing, Computer, v.33 n.4, p.41-49, April 2000