An SBus monitor board

ABSTRACT

During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. It is difficult to attach general-purpose logic analysers and in-circuit emulators to a multiple pin bus connector and hence it is not practical to catch all the bus data required to ensure that such signals are in accordance with the bus specification. Hence a given connector specific bus monitor board is a necessary instrument to attach to the system motherboard in order to monitor all bus activities. A connector specific bus monitor board provides an efficient resource with which to study the internal philosophy of system software, the software implementation process for different communication layers, and to provide debugging for hardware developers. The bus monitor board described here is designed to attach to a SUN SBus and is similar to the Transformable Computer, which appeared recently, in that its architecture is reconfigurable via the use of a Field Programmable Gate Array (FPGA). It can be programmed to customise it to various users' specific needs. It differs from the Transformable Computer in that although it can be programmed to function as a coprocessor its primary function is dedicated SBus Monitoring. It is less costly than a Transformable Computer.In this article we describe the prototype of an SBus monitor's architecture and functions, and present the experimental results obtained from a Sun SPARC work station and an Aurora SBox Expansion Chassis, which demonstrate its ability to capture and display data communication and bus activity. Since this prototype board is programmable, it has the potential to provide many special purpose SBus monitors, but also function as a programmable coprocessor.

REFERENCES

• 1: 1607A Logic State Analyser Hewlett Packard 1976 1600A Logic State Analyser Hewlett Packard 1975
• 2: C. S. Choy, et al., "A Hardware Prototyping Board for Complex Digital Design", IEEE Region 10 Conference Tencon 92 pp. 191-195, Nov. 1992
• 3: SBT-225 Single Width SBus Analyzer, Vmetro, US, 1992
• 4: T. Horikawa, "TOPAZ Hardware-Tracer Based Computer Performance Measurement and Evaluation System", NEC Res. & Develop, Vol. 33 No.4, pp. 638- 647, Oct. 1992
• 5: S. Casselman, "Virtual Computing and The Virtual Computer", IEEE Workshop on FPGAs for Custom Computing Machines, Napa, Ca. pp. 43-48, Apr. 1993
• 6: David E. Van den Bout , Joseph N. Morris , Douglas Thomae , Scott Labrozzi , Scot Wingo , Peter Hallman, AnyBoard: An FPGA-Based, Reconfigurable System, IEEE Design & Test, v.9 n.3, p.21-30, July 1992 [doi>10.1109/54.156155]
• 7: The Programmable Logic Data Book, Xilinx Inc., 1994
• 8: User Guide, Reference Cadence, 1990-1993
• 9: Open Boot PROM Toolkit User's Guide, Sun Microsystems, Inc., 1990
• 10: Writing FCode Programs for SBus Cards, Sun Microsystems, Inc., 1990
• 11: SBus Specification A2, Writing SBus Device Drivers, Sun Microsystems, Inc., 1990
• 12: James D. Lyle, SBus: information, applications, and experience, Springer-Verlag New York, Inc., New York, NY, 1992
• 13: SBox Expansion Chassis User's Manual, Aurora Technologies, Inc., 1992

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Simulation

General Terms:
Design, Reliability