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Strength reduction of multiplications by integer constants
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Volume 30 ,  Issue 2  (February 1995) table of contents
Pages: 42 - 48  
Year of Publication: 1995
ISSN:0362-1340
Author
Youfeng Wu  Sequent Computer Systems, Inc., D2-798, 15450 S.W. Koll Parkway, Beaverton, OR
Publisher
ACM  New York, NY, USA
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ABSTRACT

Replacing a multiplication of an integer constant by a sequence of simple instructions can be beneficial because it reduces the total number of cycles and also provides more opportunity for instruction level parallelism. In this paper we developed an algorithm that selectively replaces multiplications of integer constants with sequences of SUB, ADD, SHIFT, and LEA instructions. The algorithm runs fast and the generated instruction sequences are of high quality. The number of simple instructions generated for a multiplication of an integer constant is about 84.5% of the number of 1-bits in the binary representation of the constant. Also, for several popular processors, the simple instruction sequences significantly reduces the execution time to perform the multiplications.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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[1] Intel, Pentium Processor User's Manual, Volume 3: Architecture and Programming Manual. 1993.
 
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[5] Preston Briggs, source code for implementing Robert Bernstein's algorithm posted in news group comp.compilers. Oct 20, 1992.
 
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[6] Habibi, A and P.A. Wintz, "Fast Multipliers," IEEE Trans. on Computers, Vol. C-19, No. 2, pp. 153-157, Feb. 1970.
 
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