A new power estimation technique with application to decomposition of Boolean functions for low power

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A new power estimation technique with application to decomposition of Boolean functions for low power

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European Design Automation Conference archive
Proceedings of the conference on European design automation table of contents

Grenoble, France

Pages: 388 - 393

Year of Publication: 1994

ISBN:0-89791-685-9

Authors

Peter H. Schneider	Siemens ZFE BT SE 52, Otto-Hahn-Ring 6, 81730 Munich and Institute of Electronic Design Automation, Technical University of Munich, 80290 Munich
Kurt J. Antreich	Institute of Electronic Design Automation, Technical University of Munich, 80290 Munich
Ulf Schlichtmann	Institute of Electronic Design Automation, Technical University of Munich, 80290 Munich

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 0, Downloads (12 Months): 3, Citation Count: 7

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	"The Programmable Logic Data Book," Xilinz Inc., pp. 2-169 - 2-176, 1994.
	2	Farid N. Najm, Transition density, a stochastic measure of activity in digital circuits, Proceedings of the 28th conference on ACM/IEEE design automation, p.644-649, June 17-22, 1991, San Francisco, California, United States [doi>10.1145/127601.127744]
	3	A. Ghosh , S. Devadas , K. Keutzer , J. White, Estimation of average switching activity in combinational and sequential circuits, Proceedings of the 29th ACM/IEEE conference on Design automation, p.253-259, June 08-12, 1992, Anaheim, California, United States
	4	Randal E. Bryant, Graph-based algorithms for Boolean function manipulation, IEEE Transactions on Computers, v.35 n.8, p.677-691, Aug. 1986 [doi>10.1109/TC.1986.1676819]
	5	S. C. Prasat and K. Roy, "Circuit Activity Driven Multilevel Logic Optimization for Low Power Reliable Operation," IEEE European Destgn Automation Conference EDAC, pp. 368 - 372, 1993.
	6	B. Lin and H. de Man, "Low-Power Driven Technology Mapping under Timing Constraints," International Workshop on Logrc Synthesis IWLS, pp. 9a-1 - 9a-16, 1993.
	7	Chi-Ying Tsui , Massoud Pedram , Alvin M. Despain, Technology decomposition and mapping targeting low power dissipation, Proceedings of the 30th international conference on Design automation, p.68-73, June 14-18, 1993, Dallas, Texas, United States [doi>10.1145/157485.164577]
	8	José Monteiro , Srinivas Devadas , Abhijit Ghosh, Retiming sequential circuits for low power, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.398-402, November 07-11, 1993, Santa Clara, California, United States
	9	M. Alidina, S. Devadas, J. Mont&o, A. Ghosh, and M. Papaefthymiou, "Precomputation-Based Sequential Logic Optimization for Low Power," International Workshop on Low Power Desagn IWLPD, pp. 57 - 62, 1994.
	10	Yung-Te Lai , Massoud Pedram , Sarma B. K. Vrudhula, BDD based decomposition of logic functions with application to FPGA synthesis, Proceedings of the 30th international conference on Design automation, p.642-647, June 14-18, 1993, Dallas, Texas, United States [doi>10.1145/157485.165078]
	11	Lance A. Glasser , Daniel W. Dobberpuhl, The design and analysis of VLSI circuits, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1985
	12	A. Papoulis, "Probability, Random Variables and Stochastic Processes," McGraw-Hill, 1991.
	13	U. Schlichtmann, "Boolean Matching and Disjoint Decomposition for FPGA Technology Mapping," International IFIP Workshop on Logic and Architecture Synthesis, pp. 83 - 102, 1993.

CITED BY 7

	P. Schneider , S. Krishnamoorthy, Effects of correlations on accuracy of power analysis—an experimental study, Proceedings of the 1996 international symposium on Low power electronics and design, p.113-116, August 12-14, 1996, Monterey, California, United States
	M. Koegst , K. Feske , G. Franke, State assignment for FSM low power design, Proceedings of the conference on European design automation, p.28-33, September 1996, Geneva, Switzerland
	Radu Marculescu , Diana Marculescu , Massoud Pedram, Efficient power estimation for highly correlated input streams, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.628-634, June 12-16, 1995, San Francisco, California, United States
	Peter H. Schneider , Ulf Schlichtmann , Bernd Wurth, Fast Power Estimation of Large Circuits, IEEE Design & Test, v.13 n.1, p.70-78, March 1996
	Diana Marculescu , Radu Marculescu , Massoud Pedram, Information theoretic measures of energy consumption at register transfer level, Proceedings of the 1995 international symposium on Low power design, p.81-86, April 23-26, 1995, Dana Point, California, United States
	Shiva Shankar Ramani , Sanjukta Bhanja, Any-time probabilistic switching model using bayesian networks, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA
	Fei Hu , Vishwani D. Agrawal, Dual-transition glitch filtering in probabilistic waveform power estimation, Proceedings of the 15th ACM Great Lakes symposium on VLSI, April 17-19, 2005, Chicago, Illinois, USA