| ProperHITEC: a portable, parallel, object-oriented approach to sequential test generation |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 31st annual Design Automation Conference
table of contents
San Diego, California, United States
Pages: 717 - 721
Year of Publication: 1994
ISBN:0-89791-653-0
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Authors
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Steven Parkes
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Center for Reliable and High-Performance Computing, University of Illinois, 1308 W. Main, Urbana, IL
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Prithviraj Banerjee
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Center for Reliable and High-Performance Computing, University of Illinois, 1308 W. Main, Urbana, IL
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Janak Patel
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Center for Reliable and High-Performance Computing, University of Illinois, 1308 W. Main, Urbana, IL
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| Bibliometrics |
Downloads (6 Weeks): 2, Downloads (12 Months): 6, Citation Count: 4
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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S. Parkes, J. A. Chandy, and R Banerjee, "ProperCAD II: A run-time library for portable, parallel, object-oriented programming with applications to VLSI CAD," Tech. Rep. CRHC-93-22/UILU-ENG-93-2250, Center for Reliable and High-performance Computing, University of Illinois, Dec. 1993.
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S. Chandra and J. H. Patel, "Test generation in a parallel processing environment," Proc. Int. Conf. Comp. Design (ICCD-88), pp. 11-14, Oct. 1988.
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Srinivas Patil , Prithviraj Banerjee , Janak H. Patel, Parallel test generation for sequential circuits on general-purpose multiprocessors, Proceedings of the 28th conference on ACM/IEEE design automation, p.155-159, June 17-22, 1991, San Francisco, California, United States
[doi> 10.1145/127601.127651]
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P. Agrawal , V. D. Agrawal , J. Villoldo, Sequential circuit test generation on a distributed system, Proceedings of the 30th international conference on Design automation, p.107-111, June 14-18, 1993, Dallas, Texas, United States
[doi> 10.1145/157485.164762]
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A. Motohara, K. Nishimura, H. Fujiwara, and I. Shirakawa, "A parallel scheme for test-pattern generation," in Digest of Papers, International Conference on Computer-AidedDesign, pp. 156-159,Nov. 1986.
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S. Patil and E Banerjee, "A parallel branch and bound approach to test generation," IEEE Transactions on Computer Aided Design, vol. 9, pp. 313-322, Mar. 1990.
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S. Arvindam, V. Kumar, V. N. Rao, and V. Singh, "Automatic test pattern generation on parallel processors," tech. rep., Computer Science Dept, Univ. of Minnesota, May 1990.
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W. Fenton, B. Ramkumar, V. A. Saletore, A. B. Sinha, and L. V. Kal6, "Supporting machine independent programming on diverse parallel architecturs," in Proceedings of the International Conference on Parallel Processing, Aug. 1991.
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R. H. Bell, Jr., R. H. Klenke, J. H. Aylor, and R. D. Williams, "Results of a topologically partitioned parallel automatic test pattern generation system on a distributed-memory multiprocessor," ASIC '92, Sept. 1992.
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S. Patil and E Banerjee, "Performance trade-offs in a parallel test generation/fault simulation environment,"IEEE Transactions on Computer- Aided Design, vol. 10, pp. 1542-1558,Dec. 1991.
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CITED BY 4
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Steven Parkes , John A. Chandy , Prithviraj Banerjee, A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application, Proceedings of the 1994 ACM/IEEE conference on Supercomputing, November 14-18, 1994, Washington, D.C.
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Steven Parkes , John A. Chandy , Prithviraj Banerjee, A library-based approach to portable, parallel, object-oriented programming198383: interface, implementation, and application, Proceedings of the 1994 conference on Supercomputing, p.69-78, December 1994, Washington, D.C., United States
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