| Boolean matching of sequential elements |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 31st annual Design Automation Conference
table of contents
San Diego, California, United States
Pages: 691 - 697
Year of Publication: 1994
ISBN:0-89791-653-0
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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E. Detjens, G.Gannot, R.Rudell, A. Sangiovanni-Vincentelli, A. Wang, "Technology Mapping in MIS",International Conference on Computer Aided Design, pp. 116 - 119, 1987.
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David Gregory , Karen Bartlett , Aart de Geus , Gary Hachtel, SOCRATES: a system for automatically synthesizing and optimizing combinational logic, Proceedings of the 23rd ACM/IEEE conference on Design automation, p.79-85, July 1986, Las Vegas, Nevada, United States
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C. Moon, B. Lin, H. Savoj, R. Brayton, "Technology Mapping for Sequential Logic Synthesis", Proceedings of Intl. Workshop on Logic Synthesis, North Carolina, May 1989.
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R Moceyunas - Personal Communication.
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S. Muroga, Threshold Logic and its Applications. John Wiley, 1971.
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EMailhot, G. De Micheli, "Algorithms for Technology Mapping Based on Binary Decision Diagrams and on Boolean Operations",IEEE Trans. on Computer Aided Design oflntegrated Circuits and Systems, Vo112, No.5 pp. 599 - 620, 1993.
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J. Mohnke, S. Malik, "Permutation and Phase Independent Boolean Comparison", Proceedings of EDAC, 1993.
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D. S. Kung , R. F. Damiano , T. A. Nix , D. J. Geiger, BDDMAP: a technology mapper based on a new covering algorithm, Proceedings of the 29th ACM/IEEE conference on Design automation, p.484-487, June 08-12, 1992, Anaheim, California, United States
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