Hardware/software co-simulation

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Hardware/software co-simulation

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents

San Diego, California, United States

Pages: 439 - 440

Year of Publication: 1994

ISBN:0-89791-653-0

Author

James A. Rowson

Redwood Design Automation Inc., San Jose, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 8, Downloads (12 Months): 49, Citation Count: 30

Additional Information:

cited by index terms collaborative colleagues

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CITED BY 30

	Marcello Lajolo , Anand Raghunathan , Sujit Dey , Luciano Lavagno , Alberto Sangiovanni-Vincentelli, A case study on modeling shared memory access effects during performance analysis of HW/SW systems, Proceedings of the 6th international workshop on Hardware/software codesign, p.117-121, March 15-18, 1998, Seattle, Washington, United States
	Sungjoo Yoo , Gabriela Nicolescu , Damien Lyonnard , Amer Baghdadi , Ahmed A. Jerraya, A generic wrapper architecture for multi-processor SoC cosimulation and design, Proceedings of the ninth international symposium on Hardware/software codesign, p.195-200, April 2001, Copenhagen, Denmark
	Marcello Lajolo , Anand Raghunathan , Sujit Dey, Efficient power co-estimation techniques for system-on-chip design, Proceedings of the conference on Design, automation and test in Europe, p.27-34, March 27-30, 2000, Paris, France
	Patrice Gerin , Sungjoo Yoo , Gabriela Nicolescu , Ahmed A. Jerraya, Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures, Proceedings of the 2001 conference on Asia South Pacific design automation, p.63-68, January 2001, Yokohama, Japan
	Jie Liu , Marcello Lajolo , Alberto Sangiovanni-Vincentelli, Software timing analysis using HW/SW cosimulation and instruction set simulator, Proceedings of the 6th international workshop on Hardware/software codesign, p.65-69, March 15-18, 1998, Seattle, Washington, United States
	A. D. Pimentel , S. Polstra , F. Terpstra , A. W. van Halderen , J. E. Coffland , L. O. Hertzberger, Towards efficient design space exploration of heterogeneous embedded media systems, Embedded processor design challenges: systems, architectures, modeling, and simulation-SAMOS, Springer-Verlag New York, Inc., New York, NY, 2002
	Jerry Bauer , Michael Bershteyn , Ian Kaplan , Paul Vyedin, A reconfigurable logic machine for fast event-driven simulation, Proceedings of the 35th annual conference on Design automation, p.668-671, June 15-19, 1998, San Francisco, California, United States
	Lisa Guerra , Joachim Fitzner , Dipankar Talukdar , Chris Schläger , Bassam Tabbara , Vojin Zivojnovic, Cycle and phase accurate DSP modeling and integration for HW/SW co-verification, Proceedings of the 36th ACM/IEEE conference on Design automation, p.964-969, June 21-25, 1999, New Orleans, Louisiana, United States
	P. Coste , F. Hessel , Ph. Le Marrec , Z. Sugar , M. Romdhani , R. Suescun , N. Zergainoh , A. A. Jarraya, Multilanguage design of heterogeneous systems, Proceedings of the seventh international workshop on Hardware/software codesign, p.54-58, March 1999, Rome, Italy
	Claudio Passerone , Luciano Lavagno , Massimiliano Chiodo , Alberto Sangiovanni-Vincentelli, Fast hardware/software co-simulation for virtual prototyping and trade-off analysis, Proceedings of the 34th annual conference on Design automation, p.389-394, June 09-13, 1997, Anaheim, California, United States
	Stephen Edwards , Luciano Lavagno , Edward A. Lee , Alberto Sangiovanni-Vincentelli, Design of embedded systems: formal models, validation, and synthesis, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	Marcello Lajolo , Anand Raghunathan , Sujit Dey , Luciano Lavagno, Cosimulation-based power estimation for system-on-chip design, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.3, p.253-266, June 2002
	Ken Hines , Gaetano Borriello, Dynamic communication models in embedded system co-simulation, Proceedings of the 34th annual conference on Design automation, p.395-400, June 09-13, 1997, Anaheim, California, United States
	Vincenza Carchiolo , Michele Malgeri , Guiseppe Mangioni, Hardware/software synthesis of formal specifications in codesign of embedded systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.3, p.399-432, July 2000
	G. Nicolescu , S. Yoo , A. Jerraya, Mixed-level cosimulation for fine gradual refinement of communication in SoC design, Proceedings of the conference on Design, automation and test in Europe, p.754-759, March 2001, Munich, Germany
	Ivano Barbieri , Massimo Bariani , Alberto Cabitto , Marco Raggio, A Simulation and Exploration Technology for Multimedia-Application-Driven Architectures, Journal of VLSI Signal Processing Systems, v.41 n.2, p.153-168, September 2005
	B. P. Dave , N. K. Jha, CASPER: concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures, Proceedings of the conference on Design, automation and test in Europe, p.118-124, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Jianwen Zhu , Daniel D. Gajski, An ultra-fast instruction set simulator, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.3, p.363-373, June 2002
	José C. Costa , Srinivas Devadas , José C. Monteiro, Observability analysis of embedded software for coverage-directed validation, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Pai Chou , Ross Ortega , Ken Hines , Kurt Patridge , Gaetano Borriello, ipChinook: an integrated IP-based design framework for distributed embedded systems, Proceedings of the 36th ACM/IEEE conference on Design automation, p.44-49, June 21-25, 1999, New Orleans, Louisiana, United States
	Sungpack Hong , Sungjoo Yoo , Sheayun Lee , Sangwoo Lee , Hye Jeong Nam , Bum-Seok Yoo , Jaehyung Hwang , Donghyun Song , Janghwan Kim , Jeongeun Kim , HoonSang Jin , Kyu-Myung Choi , Jeong-Taek Kong , SooKwan Eo, Creation and utilization of a virtual platform for embedded software optimization:: an industrial case study, Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, October 22-25, 2006, Seoul, Korea
	Ghazanfar Asadi , Seyed Ghassem Miremadi , Alireza Ejlali, Fast co-verification of HDL models, Microelectronic Engineering, v.84 n.2, p.218-228, February, 2007
	Stefan Farfeleder , Andreas Krall , Nigel Horspool, Ultra fast cycle-accurate compiled emulation of inorder pipelined architectures, Journal of Systems Architecture: the EUROMICRO Journal, v.53 n.8, p.501-510, August, 2007
	Katalin Popovici , Ahmed Amine Jerraya, Simulink based hardware-software codesign flow for heterogeneous MPSoC, Proceedings of the 2007 summer computer simulation conference, July 16-19, 2007, San Diego, California
	Bassam Tabbara , Enrica Filippi , Luciano Lavagno, Fast hardware-software co-simulation using VHDL models, Proceedings of the conference on Design, automation and test in Europe, p.64-es, January 1999, Munich, Germany
	Jurgen Schnerr , Gunter Haug , Wolfgang Rosenstiel, Instruction Set Emulation for Rapid Prototyping of SoCs, Proceedings of the conference on Design, Automation and Test in Europe, p.10562, March 03-07, 2003
	Kyuho Shim , Youngrae Cho , Namdo Kim , Hyuncheol Baik , Kyungkuk Kim , Dusung Kim , Jaebum Kim , Byeongun Min , Kyumyung Choi , Maciej Ciesielski , Seiyang Yang, A fast two-pass HDL simulation with on-demand dump, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
	Katalin Popovici , Xavier Guerin , Frederic Rousseau , Pier Stanislao Paolucci , Ahmed Amine Jerraya, Platform-based software design flow for heterogeneous MPSoC, ACM Transactions on Embedded Computing Systems (TECS), v.7 n.4, p.1-23, July 2008
	N. C. W. M. Braspenning , E. M. Bortnik , J. M. van de Mortel-Fronczak , J. E. Rooda, Model-based system analysis using Chi and Uppaal: An industrial case study, Computers in Industry, v.59 n.1, p.41-54, January, 2008
	Maziar Goudarzi , Shaahin Hessabi , Naser MohammadZadeh , Nasim Zainolabedini, The ODYSSEY approach to early simulation-based equivalence checking at ESL level using automatically generated executable transaction-level model, Microprocessors & Microsystems, v.32 n.7, p.364-374, October, 2008