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Probabilistic analysis of large finite state machines
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents
San Diego, California, United States
Pages: 270 - 275  
Year of Publication: 1994
ISBN:0-89791-653-0
Authors
Gary D. Hachtel  University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
Enrico Macii  University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO and Politecnico di Torino, Dipartimento di Automatica e Informatica, Torino, Italy
Abelardo Pardo  University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
Fabio Somenzi  University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
Sponsors
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 4,   Downloads (12 Months): 14,   Citation Count: 21
Additional Information:

references   cited by   index terms   collaborative colleagues  

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
J. Kemeny, J. Snell, Finite Marko~ Chains, D. Van Nostrand Company, 1967.
 
2
Kishar Shridharbhai Trivedi, Probability and Statistics with Reliability, Queuing and Computer Science Applications, Prentice Hall PTR, Upper Saddle River, NJ, 1982
 
3
P. J. Courtois, Decomposability: Queuein9 and Computer System Applications, Academic Press, 1977.
 
4
W. J. Stewart, Numerical Solution8 of Markov Chains, Marcel Dekker, 1991.
 
5
O. Coudert, C. Berthet, J. C. Madre, "Verification of Sequential Machines Using Boolean Functional Vectors," IFIP Intl. Workshop on Applied Formal Method8 :for Correct VLSI Design, pp. 111-128, Leuven, Belgium, Nov. 1989.
 
6
G. D. Hachtel, E. Macii, A. Pardo, F. Somenzi, "Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine," EDAC-g$, pp. 214-218, Paris, France, Feb. 1994.
 
7
R. Iris Bahar , Erica A. Frohm , Charles M. Gaona , Gary D. Hachtel , Enrico Macii , Abelardo Pardo , Fabio Somenzi, Algebraic decision diagrams and their applications, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.188-191, November 07-11, 1993, Santa Clara, California, United States
 
8
C. Pixley, "A Theory and Implementation of Sequential Hardware Equivalence,", IEEE Transaction8 on CAD, Vol. 11, No. 12, pp. 1469-1478, Dec. 1992.
9
Yusuke Matsunaga , Patrick C. McGeer , Robert K. Brayton, On computing the transitive closure of a state transition relation, Proceedings of the 30th international conference on Design automation, p.260-265, June 14-18, 1993, Dallas, Texas, United States  [doi>10.1145/157485.164884]
 
10
F. Brglez, D. Bryan, K. Ko%mifiski, "Combinational Profiles of Sequential Benchmark Circuits," ISCAS-89, pp. 1929-1934, Portland, OR, May 1989.

CITED BY  21
Li-Pen Yuan , Sung-Mo Kang, A sequential procedure for average power analysis of sequential circuits, Proceedings of the 1997 international symposium on Low power electronics and design, p.231-234, August 18-20, 1997, Monterey, California, United States
D. Marculescu , R. Marculescu , M. Pedram, Trace-driven steady-state probability estimation in FSMs with application to power estimation, Proceedings of the conference on Design, automation and test in Europe, p.774-781, February 23-26, 1998, Le Palais des Congrés de Paris, France
A. Tyagi, Entropic bounds on FSM switching, Proceedings of the 1996 international symposium on Low power electronics and design, p.323-328, August 12-14, 1996, Monterey, California, United States
Massoud Pedram, Power minimization in IC design: principles and applications, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.1 n.1, p.3-56, Jan. 1996
Farid N. Najm, Power estimation techniques for integrated circuits, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.492-499, November 05-09, 1995, San Jose, California, United States
Joseph N. Kozhaya , Farid N. Najm, Accurate power estimation for large sequential circuits, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.488-493, November 09-13, 1997, San Jose, California, United States
M. Senn , P. Schneider , B. Wurth, Power analysis for sequential circuits at logic level, Proceedings of the conference on European design automation, p.22-27, September 1996, Geneva, Switzerland
P. Schneider , S. Krishnamoorthy, Effects of correlations on accuracy of power analysis—an experimental study, Proceedings of the 1996 international symposium on Low power electronics and design, p.113-116, August 12-14, 1996, Monterey, California, United States
Farid N. Najm , Shashank Goel , Ibrahim N. Hajj, Power estimation in sequential circuits, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.635-640, June 12-16, 1995, San Francisco, California, United States
Li-Pen Yuan , Chin-Chi Teng , Sung-Mo Kang, Statistical estimation of average power dissipation in sequential circuits, Proceedings of the 34th annual conference on Design automation, p.377-382, June 09-13, 1997, Anaheim, California, United States
Radu Marculescu , Diana Marculescu , Massoud Pedram, Composite sequence compaction for finite-state machines using block entropy and high-order Markov models, Proceedings of the 1997 international symposium on Low power electronics and design, p.190-195, August 18-20, 1997, Monterey, California, United States
Gary D. Hachtel , Mariano Hermida , Abelardo Pardo , Massimo Poncino , Fabio Somenzi, Re-encoding sequential circuits to reduce power dissipation, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.70-73, November 06-10, 1994, San Jose, California, United States
Vikram Saxena , Farid N. Najm , Ibrahim N. Hajj, Estimation of state line statistics in sequential circuits, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.7 n.3, p.455-473, July 2002
Diana Marculescu , Radu Marculescu , Massoud Pedram, Sequence compaction for probabilistic analysis of finite-state machines, Proceedings of the 34th annual conference on Design automation, p.12-15, June 09-13, 1997, Anaheim, California, United States
R. I. Bahar , E. A. Frohm , C. M. Gaona , G. D. Hachtel , E. Macii , A. Pardo , F. Somenzi, Algebric Decision Diagrams and Their Applications, Formal Methods in System Design, v.10 n.2-3, p.171-206, April -May 1997
Shin-Ichi Minato , F. Somenzi, Arithmetic Boolean Expression Manipulator Using BDDs, Formal Methods in System Design, v.10 n.2-3, p.221-242, April -May 1997
Yen-Fong Lee , Shi-Yu Huang , Sheng-Yu Hsu , I-Ling Chen , Cheng-Tao Shieh , Jian-Cheng Lin , Shih-Chieh Chang, Power estimation starategies for a low-power security processor, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
Sanjukta Bhanja , Karthikeyan Lingasubramanian , N. Ranganathan, A stimulus-free graphical probabilistic switching model for sequential circuits using dynamic bayesian networks, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.11 n.3, p.773-796, July 2006
Vikram Saxena , Farid N. Najm , Ibrahim Hajj, Monte-Carlo Approach for Power Estimation in Sequential Circuits, Proceedings of the 1997 European conference on Design and Test, p.416, March 17-20, 1997
L. Benini , G. De Micheli , E. Macii , M. Poncino , R. Scarsi, Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks, Proceedings of the 1997 European conference on Design and Test, p.514, March 17-20, 1997
P. Surti , L. F. Chao , A. Tyagi, Low power FSM design using Huffman-style encoding, Proceedings of the 1997 European conference on Design and Test, p.521, March 17-20, 1997

INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.3 Design Aids
          Subjects: Automatic synthesis

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.3 Design Aids
          Subjects: Verification

  F. Theory of Computation
  F.1 COMPUTATION BY ABSTRACT DEVICES
      F.1.1 Models of Computation
          Subjects: Automata (e.g., finite, push-down, resource-bounded)

  G. Mathematics of Computing
  G.3 PROBABILITY AND STATISTICS
      Subjects: Probabilistic algorithms (including Monte Carlo)


General Terms:
Algorithms, Design, Experimentation, Theory, Verification

Collaborative Colleagues:
Gary D. Hachtel: colleagues
Enrico Macii: colleagues
Abelardo Pardo: colleagues
Fabio Somenzi: colleagues

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