Experience with image compression chip design using unified system construction tools

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Experience with image compression chip design using unified system construction tools

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents

San Diego, California, United States

Pages: 250 - 256

Year of Publication: 1994

ISBN:0-89791-653-0

Authors

Pravil Gupta	Department of Electrical Engineering - Systems, University of Southern California, EEB 300, MC 2562, Los Angeles, CA
Chih-Tung Chen	Department of Electrical Engineering - Systems, University of Southern California, EEB 300, MC 2562, Los Angeles, CA
J. C. DeSouza-Batista	Department of Electrical Engineering - Systems, University of Southern California, EEB 300, MC 2562, Los Angeles, CA
Alice C. Parker	Department of Electrical Engineering - Systems, University of Southern California, EEB 300, MC 2562, Los Angeles, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 6, Citation Count: 10

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Shahid H. Bokhari, Assignment problems in parallel and distributed computing, Kluwer Academic Publishers, Norwell, MA, 1987
	2	C.F. Chang and B.J. Sheu. A Multi-Chip Module Design for Portable Video Compression Systems. In IEEE Multi-Chip Module Conf., pages 39-44, 1993.
	3	C.T. Chen and A.C. Parker. VHDL2DDS: A VHDL Language to DDS Data Structure Translator. Tech. Rep. CEng 91-21, Dept. of EE-Systems, Univ. Southern California, July 1991.
	4	C.T. Chen and A. C. Parker. ProPart: A Process- Level Behavioral Partitioner. Tech. Rep. CEng 93- 38, Dept of EE-Systems, Univ. of Southern California, Sept. 1993.
	8	H. Fujiwara, M.L. Liou M.M. Maruyama, K. Sho All-ASIC Implementatio: Codec. IEEE Trans. or Video Technology, 2(2):1:
	9	P. Gupta and A. C. Pa~ for Scheduling Memorycific Hardware. In 7th Int thesis, May 1994.
	10	E. K. Haddad. Optimal lel and Distributed Proce., Department of Computer nic Institute and State U
	11	L. J. Hafer and E. Hut( Tech. Rep. CMPT TR! Science, Simon Fraser C 1S6, Mar. 1990.
	12	K. Kucukcakar and A. C offs using MABAL. 27th June 1990.
	13	P.E.R. Lippens, J.L. va: Werf, W.F.J. Verhaegh, a ory Synthesis for High S} Proe. of the IEEE Custo~ May 1991.
	14	P. Marwedel. The MIM tailed Description of the Design Automation ConJ
	15	H. Park and V.K. Prasan chitectures for Huffman C tics, @eech and Signal P
	16	A. C. Parker, P. Gupta, fects of Physical Design ( Performance Tradeoff C~ tomation Conf., June 19~
	17	S. Prakash and A. Pa: Application-Specific Het Systems. Journal of Pa~ puting, 16:338-351, Dec.

CITED BY 10

	Frank Vahid, Procedure exlining: a new system-level specification transformation, Proceedings of the conference on European design automation, p.508-513, September 18-22, 1995, Brighton, England
	Frank Vahid, Procedure exlining: a transformation for improved system and behavioral synthesis, Proceedings of the 8th international symposium on System synthesis, p.84-89, September 13-15, 1995, Cannes, France
	Frank Vahid , Daniel D. Gajski, Clustering for improved system-level functional partitioning, Proceedings of the 8th international symposium on System synthesis, p.28-35, September 13-15, 1995, Cannes, France
	Frank Vahid , Daniel D. Gajski, Closeness metrics for system-level functional partitioning, Proceedings of the conference on European design automation, p.328-333, September 18-22, 1995, Brighton, England
	Frank Vahid , Daniel D. Gajski, Incremental hardware estimation during hardware/software functional partitioning, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	Frank Vahid , Thuy Dm Le , Yu-Chin Hsu, Functional partitioning improvements over structural partitioning for packaging constraints and synthesis: tool performance, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.3 n.2, p.181-208, April 1998
	Suhrid A. Wadekar , Alice C. Parker, Interconnect-based system-level energy and power prediction to guide architecture exploration, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.4, p.373-380, April 2004
	Jörg Wilberg , Raul Camposano , Wolfgang Rosenstiel, Design flow for hardware/software cosynthesis of a video compression system, Proceedings of the 3rd international workshop on Hardware/software co-design, September 22-24, 1994, Grenoble, France
	F. Vahid , D. D. Gajski, SLIF: a specification-level intermediate format for system design, Proceedings of the 1995 European conference on Design and Test, p.185, March 06-09, 1995
	Vahid , Le , Hsu, A Comparison of Functional and Structural Partitioning, Proceedings of the 9th international symposium on System synthesis, p.121, November 06-08, 1996